Publications

View the publications:


2026

  • ET: An Energy Efficient Edge Transformer ArchitecturePDF
    Shashank Nag, Alan Bacellar, Anshul Jha, Eugene John, Krishnan Kailas, Priscila Lima, Neeraja Yadwadkar, Felipe Franca, and Lizy K. John
    ACM Transactions on Architecture and Code Optimization (TACO). (July 2026)
  • Elastic Memory Remapping for Multi-tenant LLM ServingPDF
    Ruihao Li, Shagnik Pal, Vineeth Narayan Pullu, Prasoon Sinha, Jeeho Ryoo, Lizy K. John, and Neeraja J. Yadwadkar
    SIGOPS Operating Systems Review. (July 2026)
  • From Arithmetic to Logic: The Resilience of Logic and Lookup-Based Neural Networks Under Parameter Bit-FlipsPDF
    Alan T. L. Bacellar, Sathvik Chemudupati, Shashank Nag, Allison Seigler, Priscila M. V. Lima, Felipe M. G. Franca, and Lizy K. John
    Transactions on Machine Learning Research (TMLR) . (July 2026)
  • MetaHardware Lifecycle-Aware Power Planning in Commercial Hyperscale Datacenters (Operational Systems)PDF
    Ruihao Li, Leonardo Piga, Wei Su, Carlos Torres, Jovan Stojkovic, Neeraja J. Yadwadkar, Lizy K. John, and Abhishek Dhanotia
    Proceedings of the 20th USENIX Symposium on Operating Systems Design and Implementation (OSDI). (July 2026)
  • Single-Round Scalable Analytic Federated LearningPDF
    Alan T. L. Bacellar, Mustafa Munir, Felipe M. G. Franca, Priscila M. V. Lima, Radu Marculescu, and Lizy K. John
    IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR). (June 2026)
  • HELIOS: Adaptive Model And Early-Exit Selection For Efficient LLM Inference ServingPDF
    Avinash Kumar, Shashank Nag, Jason Clemons, Lizy K. John, and Poulami Das
    Conference on Machine Learning and Systems (MLSYS). (May 2026)
  • HMix : An Efficient Hardware Accelerator for Quantized MLP-Mixer InferencePDF
    Dhananjay Rao Thallikar Shyam, Shashank Nag, and Lizy K. John
    International Conference on Computing Frontiers (CF). (May 2026)
  • Arrhythmia Classification at the Edge Using a Weightless Neural Network Hardware AcceleratorPDF
    Anshul Jha, Shashank Nag, Igor D. S. Miranda, Felipe M. G. Franca, Lizy K. John, Priscila M. V. Lima, and Eugene B. John
    International Symposium on Applied Reconfigurable Computing (ARC). (April 2026)
  • Learning Based Presilicon Estimation of Design Area from Early EDA MetricsPDF
    Tarun Kholay, Anup Ashok Kedilaya, Aman Arora, Jaydeep P. Kulkarni, and Lizy K. John
    International Symposium on Applied Reconfigurable Computing (ARC). (April 2026)
  • Pitfalls of Unlabeled Disagreement-Based Drift Detection in Streaming Tree EnsemblesPDF
    Lara Sa Neves, Afonso Lourenco, Lizy K. John, and Goreti Marreiros
    Catch, Adapt, and Operate: Monitoring ML Models Under Drift (CAO) Workshop at ICLR. (April 2026)
  • Power Ranger: A Comprehensive Framework for GPU Power Characterization (poster)PDF
    Allison Seigler, Zhixing Jiang, and Lizy K. John
    2026 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). (April 2026)
  • Differentiable Weightless Neural Networks for Differential SensingPDF
    Andrew Jacob, Richard Huang, Johnny Shen, Shashank Nag, Matthew Dixon, Praveen Prasupathy, Diana Zamora-Olivares, Eric V. Anslyn, and Lizy K. John
    EdgeAI Research Symposium. (March 2026)
  • GEMM the new Gem: The Inevitable Kernel and its Sensitivity to Compiler Optimizations and LibrariesPDF
    Siyuan Ma, Bagus Hanindhito, Anushka Subramanian, and Lizy K. John
    IEEE Computer Architecture Letters (CAL). (February 2026)
  • MARU: An ML-Based Framework for Area Estimation from FPGA Resource Usage (poster)PDF
    Tarun Kholay, Anup Ashok Kedilaya, Aman Arora, Jaydeep P. Kulkarni, and Lizy K. John
    International Symposium on Field Programmable Gate Arrays (FPGA). (February 2026)
  • Weightless Neural Networks on Flexible Substrates: A Novel Approach to Wearable Machine LearningPDF
    Igor D. S. Miranda, Velu Pillai, Tejas Musale, Mugdha Jadhao, Paulo C. R. Souza Neto, Zachary Susskind, Alan Bacellar, Mael Lhostis, Priscila M. V. Lima, Diego L. C. Dutra, Eugene B. John, Mauricio Breternitz Jr., Felipe M. G. Franca, Emre Ozer, and Lizy K. John
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems. (February 2026)
  • AI and Smart Sensors Usher in a New Era in Patient CarePDF
    Eugene B. John and Lizy K. John
    IEEE Computer. (January 2026)
  • Exploration of LLM Workload Reliability based on di/dt Effects and Voltage DroopsPDF
    Zhixing Jiang, Justin Garrigus, Allison Seigler, Ethan Syed, Yan-Lun Huang, Mehdi Sadi, Tawfik Rahal-Arabi, and Lizy K. John
    International Symposium on High-Performance Computer Architecture (HPCA). (January 2026)
  • Technology Trends in Computing Hardware and Their Impacts on High-Performance Scientific Computing - Part II: Memory Systems, Interconnects, and System IntegrationPDF
    Bagus Hanindhito, Arash Fathi, Dimitrios Gourounas, Dimitar Trenev, Andreas Gertlauer, and Lizy K. John
    International Journal of High Performance Computing Applications (IJHPCA). (January 2026)

2025

  • LL-ViT: Edge Deployable Vision Transformers with Look Up Table NeuronsPDF
    Shashank Nag, Alan T.L. Bacellar, Zachary Susskind, Anshul Jha, Logan Liberty, Aishwarya Sivakumar, Eugene B. John, Krishnan Kailas, Priscila M.V. Lima, Neeraja J. Yadwadkar, Felipe M.G. Franca, and Lizy K. John
    International Conference on Field Programmable Technology 2025 (FPT 2025). (December 2025)
  • Technology Trends in Computing Hardware and Their Impacts on High-Performance Scientific Computing - Part I: General-Purpose Processors and Hardware AcceleratorsPDF
    Bagus Hanindhito, Arash Fathi, Dimitrios Gourounas, Dimitar Trenev, Andreas Gertlauer, and Lizy K. John
    International Journal of High Performance Computing Applications (IJHPCA). (December 2025)
  • XPNet: Cross-FPGA Power Prediction from High Level Language CodePDF
    Zhigang Wei, Allison Seigler, Sean Lowe, Emily Shriver, Aman Arora, and Lizy K. John
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. (December 2025)
  • Oneiros: KV Cache Optimization through Parameter Remapping for Multi-tenant LLM ServingPDF
    Ruihao Li*, Shagnik Pal*, Vineeth Narayan Pullu, Prasoon Sinha, Jeeho Ryoo, Lizy K. John, and Neeraja J. Yadwadkar
    ACM Symposium on Cloud Computing 2025 (ACM SoCC 2025). (November 2025)
  • Cognizant and Socially Aware RoboticsPDF
    Fengyuan Liu, Lizy K. John, and Ravinder Dahiya
    Computer. (October 2025)
  • The Curious Case of Global Stable LoadsPDF
    Shagnik Pal, Jeeho Ryoo, and Lizy K. John
    2025 IEEE International Symposium on Workload Characterization (IISWC). (October 2025)
  • ATAPP: Architecture and Technology Aware Power Predictor for Unseen FPGAsPDF
    Zhigang Wei, Aman Arora, Emily Shriver, and Lizy K. John
    35th International Conference on Field-Programmable Logic and Applications (FPL). (September 2025)
  • Hybrid Weightless Neural Networks for Efficient Edge InferencePDF
    Mugdha P. Jadhao, Alan T. L. Bacellar, Shashank Nag, Igor D. S. Miranda, Felipe M. G. Franca, and Lizy K. John
    35th International Conference on Field-Programmable Logic and Applications (FPL). (September 2025)
  • LUT based Neural Networks as Neuro-Symbolic SystemsPDF
    Lizy K. John, Priscila M. V. Lima, Alan T. L. Bacellar, Shashank Nag, Eugene John, and Felipe M. G. Franca
    19th International Conference on Neurosymbolic Learning and Reasoning (NeSy). (September 2025)
  • Simulation of Bit-Serial Digital Processing-In-Memory Systems
    Siyuan Ma, Jiajun Hu, Aman Arora, and Lizy K. John
    Workshop on Modeling and Simulation of Systems and Applications (MODSIM). (August 2025)
  • Old is Gold: Optimizing Single-threaded Applications with ExGen-MallocPDF
    Ruihao Li, Lizy K. John, and Neeraja J. Yadwadkar
    IEEE Computer Architecture Letters (CAL). (July 2025)
  • CADOSys: Cache Aware Design Space Optimization for Spatial ML AcceleratorsPDF
    Ruihao Li, Siyuan Ma, Krishna Kavi, Gayatri Mehta, Neeraja J. Yadwadkar, and Lizy K. John
    Great Lakes Symposium on VLSI (GLSVLSI) 2025. (June 2025)
  • Performance Implications of Pipelining the Data Transfer in CPU-GPU Heterogeneous SystemsPDF
    Ruihao Li, Bagus Hanindhito, Sanjana Yadav, Qinzhe Wu, Krishna Kavi, Gayatri Mehta, Neeraja J. Yadwadkar, and Lizy K. John
    ACM Transactions on Architecture and Code Optimization (TACO). (June 2025)
  • HighWave: Large-Scale High-Bandwidth Wave Simulations on FPGAs (Best Paper Nomination)PDF
    Dimitrios Gourounas, Austin G. James, Bagus Hanindhito, Arash Fathi, Lizy K. John, and Andreas Gerstlauer
    The IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM). (May 2025)
  • ICPE 2025 -- Keynote: AI for Performance Engineering and Performance Engineering for AIPDF
    Lizy K. John
    16th ACM/SPEC International Conference on Performance Engineering (ICPE). (May 2025)
  • Large Language Model Fine-tuning with Low-Rank Adaptation: A Performance ExplorationPDF
    Bagus Hanindhito, Bhavesh Patel, and Lizy K. John
    16th ACM/SPEC International Conference on Performance Engineering (ICPE). (May 2025)
  • Power Estimation for FPGAs with Machine Learning TechniquesPDF
    Zhigang Wei
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2025)
  • SPARK: Sparsity Aware, Low Area, Energy-Efficient, Near-memory Architecture for Accelerating Linear Programming ProblemsPDF
    Siddhartha Raman Sundara Raman, Lizy K. John, and Jaydeep P. Kulkarni
    2025 IEEE International Symposium on High-Performance Computer Architecture (HPCA 2025). (March 2025)
  • nanoML for Human Activity RecognitionPDF
    Alan T. L. Bacellar, Mugdha P. Jadhao, Shashank Nag, Priscila M. V. Lima, Felipe M. G. Franca, and Lizy K. John
    TinyML Research Symposium. (February 2025)
  • PIMSAB: A Processing-In-Memory System with Spatially-Aware Communication and Bit-Serial-Aware ComputationPDF
    Siyuan Ma, Kaustubh Mhatre, Jian Weng, Bagus Hanindhito, Zhengrong Wang, Tony Nowatzki, Lizy K. John, and Aman Arora
    ACM Transactions on Architecture and Code Optimization (TACO) (Presented at HiPEAC 2025). (January 2025)

2024

  • Algorithmic and Architectural Optimizations for Discontinuous Galerkin Finite Element SimulationsPDF
    Bagus Hanindhito
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (December 2024)
  • HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond (Best Paper Award)PDF
    Stefan Abi-Karam, Rishov Sarkar, Allison Seigler, Sean Lowe, Zhigang Wei, Hanqiu Chen, Nanditha Rao, Lizy K. John, Aman Arora, and Cong Hao
    2024 ACM/IEEE International Symposium on Machine Learning for CAD (MLCAD 2024). (September 2024)
  • arrWNN: Arrhythmia-detecting Weightless Neural Network FlexICPDF
    Velu Pillai, Igor D. S. Miranda, Tejas Musale, Mugdha Jadhao, Paulo C. R. Souza Neto, Zachary Susskind, Alan T. L. Bacellar, Mael Lhostis, Priscila Lima, Diego Dutra, Eugene B. John, Mauricio Breternitz Jr., Felipe Franca, Emre Ozer, and Lizy K. John
    2024 IEEE International Flexible Electronics Conference (IFETC' 2024). (September 2024)
  • LogicNets vs. ULEEN : Comparing Two Novel High Throughput Edge ML Inference Techniques on FPGA PDF
    Shashank Nag, Zachary Susskind, Aman Arora, Alan T.L. Bacellar, Diego L.C. Dutra, Igor D.S. Miranda, Krishnan Kailas, Eugene B. John, Mauricio Breternitz Jr., Priscila M. V. Lima, Felipe M. G. Franca, and Lizy K. John
    2024 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS' 2024). (August 2024)
  • Differentiable Weightless Neural NetworksPDF
    Alan T. L. Bacellar, Zachary Susskind, Mauricio Breternitz Jr., Eugene John, Lizy K. John, Priscila M. V. Lima, and Felipe M. G. Franca
    2024 International Conference on Machine Learning (ICML '24'). (July 2024)
  • An Open Source Framework for High-Level Synthesis Dataset Generation for Machine LearningPDF
    Stefan Abi-Karam, Rishov Sarkar, Allison Seigler, Sean Lowe, Zhigang Wei, Hanqiu Chen, Nanditha Rao, Lizy K. John, Aman Arora, and Cong Hao
    3rd Open-Source Computor Architecture Research (OSCAR' 2024) in Conjuction with The 51st International Symposium on Computer Architecture (ISCA 2024). (June 2024)
  • Comparing Data Precision on Low-Rank Adaptation for Fine-tuning Large Language Models
    Bagus Hanindhito, Bhavesh Patel, and Lizy K. John
    New Approaches for Addressing the Computing Requirements of LLMs and GNNs (ARC-LG' 2024) in Conjuction with The 51st International Symposium on Computer Architecture (ISCA 2024). (June 2024)
  • Efficient FPGA-based power model adaption with Transfer-Learning and Meta-Learning
    Zhigang Wei, Aman Arora, Emily Shriver, and Lizy K. John
    8th Workshop on Cognitive Architectures (COGARCH' 2024) in Conjuction with The 51st International Symposium on Computer Architecture (ISCA 2024). (June 2024)
  • Lightweight Vision Transformers for Low Energy Edge InferencePDF
    Shashank Nag, Logan Liberty, Aishwarya Sivakumar, Neeraja J. Yadwadkar, and Lizy K. John
    ML for Computer Architecture and Systems (MLArchSys' 2024) in Conjuction with The 51st International Symposium on Computer Architecture (ISCA 2024). (June 2024)
  • Soon Filter: Advancing Feed-Forward Neural Architectures for Inference at the EdgePDF
    Alan T. L. Bacellar, Zachary Susskind, Mauricio Breternitz Jr., Eugene John, Lizy K. John, Felipe M. G. Franca, and Priscila M. V. Lima
    2024 International Join Conference on Neural Networks (IJCNN '24). (June 2024)
  • Accelerating ML Workloads using GPU Tensor Cores: The Good, the Bad, and the UglyPDF
    Bagus Hanindhito and Lizy K. John
    15th ACM/SPEC International Conference on Performance Engineering. (May 2024)
  • Bandwidth Characterization of DeepSpeed on Distributed Large Language Model TrainingPDF
    Bagus Hanindhito, Bhavesh Patel, and Lizy K. John
    2024 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS'24). (May 2024)
  • NEM-GNN: DAC/ADC-less, Scalable, Reconfigurable, Graph and Sparsity-Aware Near-Memory Accelerator for Graph Neural NetworksPDF
    Siddhartha Raman Sundara Raman, Lizy K. John, and Jaydeep P. Kulkarni
    ACM Transactions on Architecture and Code Optimization (TACO). (May 2024)
  • BLQ: Light-Weight Locality-Aware Runtime for Blocking-Less QueuingPDF
    Qinzhe Wu, Ruihao Li, Jonathan Beard, and Lizy John
    ACM SIGPLAN 33rd International Conference on Compiler Construction. (March 2024)
  • SACHI: A Stationarity-Aware, All-Digital, Near-Cache, Ising Architecture
    Siddhartha Raman Sundara Raman, Lizy K. John, and Jaydeep P. Kulkarni
    The 30th International Symposium on High-Performance Computer Architecture (HPCA-30). (March 2024)
  • SecurityCloak: Protection against cache timing and speculative memory access attacksPDF
    Fernando Mosquera, Ashen Ekanayake, William Hua, Krishna Kavi, Gayatri Mehta, and Lizy K. John
    Journal of Systems Architecture (JSA). (March 2024)

2023

  • ULEEN: A Novel Architecture for Ultra-low-energy Edge Neural NetworksPDF
    Zachary Susskind, Aman Arora, Igor Dantas Dos Santos Miranda, Alan T. L. Bacellar, Luis Armando Quintanilla Villon, Rafael Fontella Katopodis, Leandro Santiago de Araujo, Diego Leonel Cadette Dutra, Priscila Machado Vieira Lima, Felipe Maia Galvao Franca, Mauricio Breternitz Jr., and Lizy K. John
    ACM Transactions on Architecture and Code Optimization (TACO). (December 2023)
  • Do Video Encoding Workloads Stress the Microarchitecture?PDF
    Steffen Jensen, Jaekyu Lee, Dam Sunwoo, Matt Horsnell, Matthew Siggs, Jeeho Ryoo, and Lizy K. John
    2023 IEEE International Symposium on Workload Characterization (IISWC). (October 2023)
  • Performance Implications of Async Memcpy and UVM: A Tale of Two Data Transfer ModesPDF
    Ruihao Li, Sanjana Yadav, Qinzhe Wu, Krishna Kavi, Gayatri Mehta, Neeraja J. Yadwadkar, and Lizy K. John
    2023 IEEE International Symposium on Workload Characterization (IISWC). (October 2023)
  • Architectural Support for Message Queue Task ParallelismPDF
    Qinzhe Wu
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (August 2023)
  • Dendrite-inspired Computing to Improve Resilience of Neural Networks to Faults in Emerging Memory TechnologiesPDF
    Lizy K. John, Felipe M. G. Franca, Subhasish Mitra, Zachary Susskind, Priscila M. V. Lima, Igor D. S. Miranda, Eugene B. John, Diego L. C. Dutra, and Mauricio Breternitz Jr.
    2023 IEEE International Conference on Rebooting Computing (ICRC'23). (August 2023)
  • Guard Cache: Creating False Cache Hits and Misses To Mitigate Side-Channel AttacksPDF
    Fernando Mosquera, Krishna Kavi, Gayatri Mehta, and Lizy K. John
    2023 Silicon Valley Cybersecurity Conference (SVCC). (August 2023)
  • Guard Cache: Creating Noisy Side ChannelsPDF
    Fernando Mosquera, Krishna Kavi, Gayatri Mehta, and Lizy K. John
    IEEE Computer Architecture Letters (CAL). (August 2023)
  • Optimizing FPGA Architecture for Deep Learning WorkloadsPDF
    Aman Arora
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (August 2023)
  • COIN: Combinational Intelligent NetworksPDF
    Igor Dantas Dos Santos Miranda, Aman Arora, Zachary Susskind, Josias S. A. Souza, Mugdha P. Jadhao, Luis Armando Quintanilla Villon, Diego Leonel Cadette Dutra, Priscila Machado Vieira Lima, Felipe Maia Galvao Franca, Mauricio Breternitz Jr., and Lizy K. John
    IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP) . (July 2023)
  • FAWS: FPGA Acceleration of Large-Scale Wave SimulationsPDF
    Dimitrios Gourounas, Bagus Hanindhito, Arash Fathi, Dimitar Trenev, Lizy K. John, and Andreas Gerstlauer
    IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP) . (July 2023)
  • HLSDataset: Open-Source Dataset for ML-Assisted FPGA Design using High Level SynthesisPDF
    Zhigang Wei, Aman Arora, Ruihao Li, and Lizy K. John
    IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP) . (July 2023)
  • NextGen-Malloc: Giving Memory Allocator Its Own Room in the HousePDF
    Ruihao Li, Qinzhe Wu, Krishna Kavi, Gayatri Mehta, Neeraja J. Yadwadkar, and Lizy K. John
    HotOS XIX: The 19th Workshop on Hot Topics in Operating Systems (HotOS) . (June 2023)
  • Infinity Stream: Portable and Programmer-Friendly In-/Near-Memory FusionPDF
    Zhengrong Wang, Christopher Liu, Aman Arora, Lizy K. John, and Tony Nowatzki
    28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) . (March 2023)
  • LAWS: Large-Scale Accelerated Wave Simulations on FPGAs
    Dimitrios Gourounas, Bagus Hanindhito, Arash Fathi, Dimitar Trenev, Lizy K. John, and Andreas Gerstlauer
    2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA'23). (February 2023)
  • A conditional branch predictor based on weightless neural networksPDF
    Luis Armando Quintanilla Villon, Zachary Susskind, Alan T. L. Bacellar, Igor Dantas Dos Santos Miranda, Leandro Santiago de Araujo, Priscila Machado Vieira Lima, Mauricio Breternitz Jr., Lizy K. John, Felipe Maia Galvao Franca, and Diego Leonel Cadette Dutra
    Neurocomputing . (2023)
  • CoMeFa: Deploying Compute-in-Memory on FPGAs for Deep Learning Acceleration.PDF
    Aman Arora, Atharva Bhamburkar, Aatman Borda, Tanmay Anand, Rishabh Sehgal, Bagus Hanindhito, Pierre-Emmanuel Gaillardon, Jaydeep Kulkarni, and Lizy K. John
    ACM Transactions on Reconfigurable Systems (TRETS). (2023)
  • Koios 2.0: Open-Source Deep Learning Benchmarks for FPGA Architecture and CAD ResearchPDF
    Aman Arora, Andrew Boutros, Seyed Alireza Damghani, Karan Mathur, Vedant Mohanty, Tanmay Anand, Mohamed Elgammal, Kenneth B. Kent, Vaughn Betz, and Lizy K. John
    IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems (TCAD). (2023)

2022

  • Performance Impact of NVMe-Over-TCP on HDFS WorkloadsPDF
    Nikita Sharma, Ruihao Li, Qinzhe Wu, and Lizy Kurian John
    First International Workshop on Intelligent and Adaptive Edge-Cloud Operations and Services (Intel4EC, in conjunction with UCC 2022). (December 2022)
  • Performance of Java in Function-as-a-Service ComputingPDF
    A. Dowd, Qinzhe Wu, and Lizy Kurian John
    11th International Workshop on Cloud and Edge Computing, and Applications Management (CloudAM, in conjunction with UCC 2022). (December 2022)
  • A WiSARD-based conditional branch predictorPDF
    Luis Armando Quintanilla Villon, Zachary Susskind, Alan T. L. Bacellar, Igor Dantas Dos Santos Miranda, Leandro Santiago de Araujo, Priscila Machado Vieira Lima, Mauricio Breternitz Jr., Lizy K. John, Felipe Maia Galvao Franca, and Diego Leonel Cadette Dutra
    European Symposium on Artificial Neural Networks, Computational Intelligence and Machine Learning (ESANN). (October 2022)
  • Distributive thermometer: A new unary encoding for weightless neural networksPDF
    Alan T. L. Bacellar, Zachary Susskind, Luis Armando Quintanilla Villon, Igor Dantas Dos Santos Miranda, Leandro Santiago de Araujo, Diego Leonel Cadette Dutra, Mauricio Breternitz Jr., Lizy K. John, Priscila Machado Vieira Lima, and Felipe Maia Galvao Franca
    European Symposium on Artificial Neural Networks, Computational Intelligence and Machine Learning (ESANN). (October 2022)
  • Pruning Weightless Neural NetworksPDF
    Zachary Susskind, Alan T. L. Bacellar, Aman Arora, Luis Armando Quintanilla Villon, Renan Mendanha, Leandro Santiago de Araujo, Diego Leonel Cadette Dutra, Priscila Machado Vieira Lima, Felipe Maia Galvao Franca, Igor Dantas Dos Santos Miranda, Mauricio Breternitz Jr., and Lizy K. John
    European Symposium on Artificial Neural Networks, Computational Intelligence and Machine Learning (ESANN). (October 2022)
  • Weightless Neural Networks for Efficient Edge InferencePDF
    Zachary Susskind, Aman Arora, Igor Dantas Dos Santos Miranda, Luis Armando Quintanilla Villon, Rafael Fontella Katopodis, Leandro Santiago de Araujo, Diego Leonel Cadette Dutra, Priscila Machado Vieira Lima, Felipe Maia Galvao Franca, Mauricio Breternitz Jr., and Lizy K. John
    International Conference on Parallel Architectures and Compilation Techniques (PACT). (October 2022)
  • SPAMeR: Speculative Push for Anticipated Message Requests in Multi-Core SystemsPDF
    Qinzhe Wu, Ashen Ekanayake, Ruihao Li, Jonathan Beard, and Lizy K. John
    The IEEE International Conference on Parallel Processing (ICPP). (August 2022)
  • Tensor Slices: FPGA Building Blocks for the Deep Learning EraPDF
    Aman Arora, Moinak Ghosh, Samidh Mehta, Vaughn Betz, and Lizy K. John
    ACM Transactions on Reconfigurable Systems (TRETS). (August 2022)
  • LogicWiSARD: Memoryless Synthesis of Weightless Neural NetworksPDF
    Igor Dantas Dos Santos Miranda, Aman Arora, Zachary Susskind, Lizy K. John, Luis Armando Quintanilla Villon, Rafael Fontella Katopodis, Diego Leonel Cadette Dutra, Priscila Machado Vieira Lima, Felipe Maia Galvao Franca, Leandro Santiago de Araujo, and Mauricio Breternitz Jr.
    IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP). (July 2022)
  • GAPS: GPU-acceleration of PDE Solvers for Wave SimulationPDF
    Bagus Hanindhito, Dimitrios Gourounas, Aarash Fathi, Dimitar Trenev, Andreas Gerstlauer, and Lizy K. John
    ICS '22: Proceedings of the 36th ACM International Conference on Supercomputing. (June 2022)
  • CoMeFa: Compute-in-Memory Blocks for FPGAs (Best Paper Award)PDF
    Aman Arora, Tanmay Anand, Aatman Borda, Rishabh Sehgal, Bagus Hanindhito, Jaydeep Kulkarni, and Lizy K. John
    The IEEE International Symposium on Field-Programmable Custom Computing Machines. (May 2022)
  • Hardware-aware 3D Model Workload Selection and Characterization for Graphics and ML ApplicationsPDF
    Ruihao Li, Aman Arora, Sikan Li, Qinzhe Wu, and Lizy K. John
    The 23rd International Symposium on Quality Electronic Design (ISQED'22). (April 2022)
  • LogGen: A Parameterized Generator for Designing Floating-Point Logarithm Units for Deep LearningPDF
    Pragnesh Patel, Aman Arora, Earl Swartzlander, and Lizy K. John
    The 23rd International Symposium on Quality Electronic Design (ISQED'22). (April 2022)

2021

  • Compute RAMs: Adaptable Compute and Storage Blocks for DL-Optimized FPGAsPDF
    Aman Arora, Bagus Hanindhito, and Lizy K. John
    Asilomar Conference on Signals, Systems, and Computers (ASILOMAR). LCA Group, Department of Electrical and Computer Engineering, The University of Texas at Austin. No. TR-210607-01. (October 2021)
  • Hardware Accelerator Integration Tradeoffs for High-Performance Computing: A Case Study of GEMM Acceleration in N-Body MethodsPDF
    Mochamad Asri, Dhairya Malhotra, Jiajun Wang, George Biros, Lizy K. John, and Andreas Gerstlauer
    IEEE Transactions on Parallel and Distributed Systems (Volume: 32, Issue: 8, August 2021). (August 2021)
  • Koios: A Deep Learning Benchmark Suite for FPGA Architecture and CAD ResearchPDF
    Aman Arora, Andrew Boutros, Daniel Rauch, Aishwarya Rajen, Aatman Borda, Seyed Alireza Damghani, Samidh Mehta, Sangram Kate, Pragnesh Patel, Kenneth B. Kent, Vaughn Betz, and Lizy K. John
    The IEEE International Conference on Field-Programmable Logic and Applications (FPL). (August 2021)
  • Wave-PIM: Accelerating Wave Simulation Using Processing-in-MemoryPDF
    Bagus Hanindhito*, Ruihao Li*, Dimitrios Gourounas, Arash Fathi, Karan Govil, Dimitar Trenev, Andreas Gerstlauer, and Lizy K. John
    The IEEE International Conference on Parallel Processing (ICPP). (August 2021)
  • ISCA 2021 - Panel 1: Microprocessors at 50PDF
    The 48th International Symposium on Computer Architecture. (June 2021)
  • Thermal-Aware Design Space Exploration of 3D Systolic ML AcceleratorsPDF
    Rahul Matur, Ajay Krishna Ananda Kumar, Lizy K. John, and Jaydeep Kulkarni
    IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (Volume: 7, Issue: 1, June 2021). (June 2021)
  • A Tensor Processing Unit Design for FPGA BenchmarkingPDF
    Sangramsinh Kate
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2021)
  • Virtual-Link: A Scalable Multi-Producer, Multi-Consumer Message Queue Architecture for Cross-Core CommunicationPDF
    Qinzhe Wu, Jonathan Beard, Ashen Ekanayake, Andreas Gerstlauer, and Lizy K. John
    International Parallel and Distributed Processing Symposium (IPDPS). (May 2021)
  • Improving CNN Performance on FPGA Clusters through Topology ExplorationPDF
    Ruihao Li, Ke Liu, Xiaojun Cai, Mengying Zhao, Lizy K. John, and Zhiping Jia
    The 36th ACM/SIGAPP Symposium On Applied Computing (SAC 2021). (March 2021)
  • Tensor Slices to the Rescue: Supercharging ML acceleration on FPGAsPDF
    Aman Arora, Samidh Mehta, Vaughn Betz, and Lizy K. John
    International Symposium on Field-Programmable Gate Arrays (FPGA'21). (February 2021)

2020

  • Accelerating Force-directed Graph Layout with Processing-in-Memory ArchitecturePDF
    Ruihao Li, Shuang Song, Qinzhe Wu, and Lizy K. John
    The 2020 International Conference on High Performance Computing, Data, and Analytics. (December 2020)
  • Demystifying graph processing frameworks and benchmarksPDF
    Junyong Deng, Qinzhe Wu, Xiaoyan Wu, Shuang Song, Joseph Dean, and Lizy K. John
    Science China Information Sciences. (December 2020)
  • ATTC (@𝐶) : Addressable-TLB based Translation CoherencePDF
    Harsh Gugale, Nagendra Gulur, Yashwant Marathe, and Lizy K. John
    The 2020 International Conference on Parallel Architectures and Compilation Techniques (PACT ’20). (October 2020)
  • IISWC 2020 - Tutorial: Proxy Benchmarks for Reproducible ResearchPDF
    Lizy Kurian John, Steven Flolid, Zachary Susskind, and Emily Shriver
    The IEEE International Symposium on Workload Characterization (IISWC). (October 2020)
  • Demystifying the MLPerf Training Benchmark SuitePDF
    Snehil Verma, Qinzhe Wu, Bagus Hanindhito, Gunjan Jha, Eugene John, Ramesh Radhakrishnan, and Lizy Kurian John
    IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). (August 2020)
  • SimTrace: Capturing Over Time Program Phase Behavior (poster)PDF
    Steven Flolid, Emily Shriver, Zachary Susskind, Benjamin Thorell, and Lizy K. John
    IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). (August 2020)
  • Design Space Exploration for Softmax ImplementationsPDF
    Zhigang Wei, Aman Arora, Pragenesh Patel, and Lizy Kurian John
    The 31st IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP). (July 2020)
  • Hamamu: Specializing FPGAs for ML Applications by Adding Hard Matrix Multiplier BlocksPDF
    Aman Arora, Zhigang Wei, and Lizy Kurian John
    The 31st IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP). (July 2020)
  • Deep Learning Training at Scale: Experiments with MLPerf on Multi-GPU and Multi-TPU HardwarePDF
    Snehil Verma
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2020)
  • GPU-Accelerated High-Performance Computing for Architecture-Aware Wave Simulation based on Discontinuous Galerkin Algorithms
    Bagus Hanindhito
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2020)
  • Improving Distributed Graph Processing by Load Balancing and Redundancy ReductionPDF
    Shuang Song
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (March 2020)

2019

  • Reducing Data Movement and Energy in Multilevel Cache Hierarchies without Losing Performance: Can you have it all?PDF
    Jiajun Wang, Prakash Ramrakhyani, Wendy Elsasser, and Lizy Kurian John
    The 28th International Conference on Parallel Architectures and Compilation Techniques (PACT) 2019. (September 2019)
  • Can We Trust Profiling Results? Understanding and Fixing the Inaccuracy in Modern Profilers
    Hao Xu, Qingsen Wang, Shuang Song, Lizy Kurian John, and Xu Liu
    The ACM International Conference on Supercomputing (ICS). (June 2019)
  • Reuse Aware Data Placement Schemes For Multilevel Cache HierarchiesPDF
    Jiajun Wang
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2019)
  • A Study of Core Utilization and Residency in Heterogeneous Smart Phone ArchitecturesPDF
    Joseph Whitehouse, Qinzhe Wu, Shuang Song, Eugene John, Andreas Gerstlauer, and Lizy K. John
    ACM International Conference on Performance Engineering (ICPE). (April 2019)
  • Demystifying Hardware Infrastructure Choices for Deep Learning Using MLPerf
    Ramesh Radhakrishnan, Snehil Verma, Qinzhe Wu, Bagus Hanindhito, Gunjan Jha, Eugene John, and Lizy Kurian John
    Nvidia GPU Technology Conference 2019 (GTC) . (March 2019)
  • Metrics for Machine Learning Workload BenchmarkingPDF
    Snehil Verma, Qinzhe Wu, Bagus Hanindhito, Gunjan Jha, Eugene John, Ramesh Radhakrishnan, and Lizy Kurian John
    International Workshop on Performance Analysis of Machine Learning Systems (FastPath) in conjunction with ISPASS 2019. (March 2019)

2018

  • ComP-Net: Command Processor Networking for Efficient Intra-kernel Communications on GPUs
    Michael LeBeane, Khaled Hamidouche, Mauricio Breternitz, Brad Benton, Steve Reinhardt, and Lizy K. John
    International Conference on Parallel Architectures and Compilation Techniques (PACT) . (November 2018)
  • Hot Regions in SPEC CPU2017PDF
    Qinzhe Wu, Steven Flolid, Shuang Song, Junyong Deng, and Lizy K. John
    IEEE International Symposium on Workload Characterization (IISWC). (October 2018)
  • Puzzle Memory: A Multifractional Partitioned Heterogeneous Memory SchemePDF
    Jee Ho Ryoo, Shuang Song, and Lizy K. John
    International Conference on Computer Design (ICCD). (October 2018)
  • Characterization of Smartphone Governor StrategiesPDF
    Sarbartha Banerjee and Lizy K. John
    European Conference on Parallel Processing (EuroPar). (August 2018)
  • Inproving Virtual Memory Performance in Virtualized EnvironmentsPDF
    Yashwant Marathe
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (August 2018)
  • Optimizing Communication for Clusters of GPUsPDF
    Michael LeBeane
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (August 2018)
  • A Case for Granularity Aware Page Migration
    Jee Ho Ryoo, Lizy K. John, and Arkaprava Basu
    The ACM International Conference on Supercomputing (ICS). (June 2018)
  • Benchmarking Big Data Systems: A Review
    Rui Han, Lizy K. John, and Jianfeng Zhan
    IEEE Transactions on Services Computing. (June 2018)
  • HALO: A Hierarchical Memory Access Locality Modeling Technique for Memory System Exploration
    Reena Panda and Lizy K. John
    The ACM International Conference on Supercomputing (ICS). (June 2018)
  • Experiments with SPEC CPU 2017: Similarity, Balance, Phase Behavior and SimPointsPDF
    Shuang Song, Qinzhe Wu, Steven Floid, Joseph Dean, Reena Panda, Junyong Deng, and Lizy K. John
    Tech Report TR-180515-01. LCA Group, Department of Electrical and Computer Engineering, The University of Texas at Austin. No. TR-180515-01. (May 2018)
  • CAMP: Accurate Modeling of Core and Memory Locality for Proxy Generation of Big-data Applications
    Reena Panda, Xinnian Zheng, Andreas Gerstaluer, and Lizy K. John
    Conference for Design, Automation and Test in Europe (DATE). (March 2018)
  • Wait of a Decade: Did SPEC CPU 2017 Broaden the Performance Horizon?PDF
    Reena Panda*, Shuang Song*, Joseph Dean, and Lizy K. John (Reena and Shuang are both co-first authors)
    IEEE International Symposium on High-Performance Computer Architecture(HPCA). (February 2018)
  • BUQS: Battery- and User-aware QoS Scaling for Interactive Mobile Devices
    Wooseok Lee, Reena Panda, Dam Sunwoo, Jose Joao, Andreas Gerstlauer, and Lizy K. John
    Asia and South Pacific Design Automation Conference (ASP-DAC). (January 2018)
  • SelSMaP: A Selective Stride Masking Prefetching Scheme
    Jiajun Wang, Reena Panda, and Lizy K. John
    ACM Transactions on Architecture and Code Optimization (TACO). (2018)
  • Start Late or Finish Early: A Distributed Graph Processing System with Redundancy ReductionPDF
    Shuang Song, Xu Liu, Qinzhe Wu, Andreas Gerstlauer, Tao Li, and Lizy K. John
    Proceedings of the VLDB Endowments (PVLDB). (2018)

2017

  • Accurate Modeling of Core and Memory Locality for Proxy Generation Targeting Emerging Applications and ArchitecturesPDF
    Reena Panda
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (December 2017)
  • GPU Triggered Networking for Intra-Kernel CommunicationsPDF
    Michael LeBeane, Khaled Hamidouche, Brad Benton, Mauricio Breternitz, Steven K. Reinhardt, and Lizy K. John
    The International Conference for High Performance Computing, Networking, Storage, and Analysis (SC). (November 2017)
  • SelSMaP: A Selective Stride Masking Prefetching Scheme
    Jiajun Wang, Reena Panda, and Lizy K. John
    International Conference on Computer Design (ICCD). (November 2017)
  • CSALT: Context Switch Aware Large TLBPDF
    Yashwant Marathe, Nagendra Gulur, Jee Ho Ryoo, Shuang Song, and Lizy K. John
    International Symposium on Microarchitecture (MICRO). (October 2017)
  • POWSER: A Novel User-Experience Based Power Management MetricPDF
    Maithili P. Gandhe, Lizy K. John, and Andreas Gerstlauer
    International Green and Sustainable Computing Conference (IGSC). (October 2017)
  • Proxy Benchmarks for Emerging Big-Data WorkloadsPDF
    Reena Panda and Lizy K. John
    International Conference on Parallel Architectures and Compilation Techniques (PACT). (September 2017)
  • Rethinking TLB Designs in Virtualized Environments: A Very Large Part-of-Memory TLBPDF
    Jee Ho Ryoo, Nagendra Gulur, Shuang Song, and Lizy K. John
    International Symposium on Computer Architecture (ISCA). (June 2017)
  • Statistical Pattern Based Modeling of GPU Memory Access Streams
    Reena Panda, Xinnian Zheng, Jiajun Wang, Andreas Gerstlauer, and Lizy K. John
    Design Automation Conference (DAC). (June 2017)
  • Cloud-guided QoS and Energy Management for Mobile Interactive Web ApplicationsPDF
    Wooseok Lee, Dam Sunwoo, Andreas Gerstlauer, and Lizy K. John
    Mobile Software Engineering and Systems (MOBILESoft). (May 2017)
  • Exploring Heterogeneous-ISA Core Architectures for High-Performance Energy-Efficient Mobile SoCs (Poster)PDF
    Wooseok Lee, Dam Sunwoo, Christopher D. Emmons, Andreas Gerstlauer, and Lizy K. John
    Great Lakes Symposium on VLSI (GLSVLSI). (May 2017)
  • Fine-Grain Program Snippets Generator for Mobile Core DesignPDF
    Shuang Song, Raj Desikan Mohamad Barakat, Sridhar Sundaram, Andreas Gerstlauer, and Lizy K. John
    Great Lakes Symposium on VLSI (GLSVLSI). (May 2017)
  • Improving System Performance by Utilizing Heterogeneous MemoriesPDF
    Jee Ho Ryoo
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2017)
  • Accurate Address Streams for LLC and Beyond (SLAB): A Methodology to Enable System Exploration
    Reena Panda, Xinnian Zheng, and Lizy K. John
    International Symposium on Performance Analysis of Systems and Software (ISPASS) . (April 2017)
  • Prefetching for Cloud Workloads: An Analysis Based on Address Patterns (Best Paper Nominee)PDF
    Jiajun Wang, Reena Panda, Xinnian Zheng, and Lizy K. John
    International Symposium on Performance Analysis of Systems and Software (ISPASS) . (April 2017)
  • Proxy benchmarks for emerging big-data workloads (Poster)PDF
    Reena Panda and Lizy K. John
    International Symposium on Performance Analysis of Systems and Software (ISPASS) . (April 2017)
  • Exploring Opportunities for Heterogeneous-ISA Core Architectures in High-Performance Mobile SoCsPDF
    Wooseok Lee, Dam Sunwoo, Christopher D. Emmons, Andreas Gerstlauer, and Lizy K. John
    Tech Report UT-CERC-17-01. Computer Engineering Research Center, The University of Texas at Austin. No. UT-CERC-17-01. (March 2017)
  • High-Level Synthesis of Approximate Hardware under Joint Precision and Voltage ScalingPDF
    Seogoo Lee, Lizy K. John, and Andreas Gerstlauer
    Design, Automation and Test in Europe (DATE) . (March 2017)
  • Sampling-Based Binary-Level Cross-Platform Performance Estimation
    Xinnian Zheng, Haris Vikalo, Shuang Song, Lizy K. John, and Andreas Gerstlauer
    Conference for Design, Automation and Test in Europe (DATE). (March 2017)
  • SILC-FM: Subblocked InterLeaved Cache-Like Flat Memory OrganizationPDF
    Jee Ho Ryoo, Mitesh R. Meswani, and Lizy K. John
    The IEEE Symposium on High Performance Computer Architecture (HPCA). (February 2017)
  • Source-Level Performance, Energy, Reliability, Power and Thermal (PERPT) Simulation
    Zhuoran Zhao, Andreas M. Gerstlauer, and Lizy K. John
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). (February 2017)
  • LACross: Learning-based Fine-grained Analytical Cross-Platform Performance and Power Prediction
    Xinnian Zheng, Pradeep Ravikumar, Lizy K. John, and Andreas M. Gerstlauer
    International Journal of Parallel Programming (IJPP). (January 2017)

2016

  • Fine-grained Power Analysis of Emerging Graph Processing Workloads for Cloud Operations Management
    Shuang Song, Xinnian Zheng, Andreas Gerstlauer, and Lizy K. John
    The IEEE Big Data for Cloud Operations Management Workshop (BDCOM). (December 2016)
  • Identifying Performance Bottlenecks in Hive: Use of Processor Counters
    Alexander C. Shulyak and Lizy K. John
    The IEEE Big Data for Cloud Operations Management Workshop (BDCOM). (December 2016)
  • Extended Task Queuing: Active Messages for Heterogeneous Systems
    Michael LeBeane, Brandon Potter, Abhisek Pan, Alexandru Dutu, Vinay Agarwala, Wonchan Lee, Deepak Majeti, Bibek Ghimire, Eric Van Tassell, Samuel Wasmundt, Brad Benton, Mauricio Breternitz, Michael L. Chu, Mithuna Thottethodi, Lizy K. John, and Steven K. Reinhardt
    The International Conference for High Performance Computing, Networking, Storage, and Analysis (SC). (November 2016)
  • SILC-FM: Subblocked InterLeaved Cache-Like Flat Memory Organization (poster)
    Jee Ho Ryoo, Mitesh R. Meswani, Reena Panda, and Lizy K. John
    The IEEE International Conference on Parallel Architectures and Compilation Techniques (PACT). (September 2016)
  • Optimizing GPGPU Kernel Summation for Performance and Energy EfficiencyPDF
    Jiajun Wang, Ahmed Khawaja, George Biros, Andreas Gerstlauer, and Lizy K. John
    Workshop on Heterogeneous and Unconventional Cluster Architectures and Applications (HUCAA). (August 2016)
  • Proxy-Guided Load Balancing of Graph Processing Workloads on Heterogeneous Clusters
    Shuang Song, Meng Li, Xinnian Zheng, Jee Ho Ryoo, Reena Panda, Michael LeBeane, Andreas Gerstlauer, and Lizy K. John
    The IEEE International Conference on Parallel Processing (ICPP). (August 2016)
  • Genesys: Automatically Generating Representative Training-sets
    Reena Panda, Xinnian Zheng, Jee Ho Ryoo, Michael LeBeane, Shuang Song, Andreas Gerstlauer, and Lizy K. John
    The IEEE International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS). (July 2016)
  • Accurate Phase-Level Cross-Platform Power and Performance Estimation (Best Paper Award)
    Xinnian Zheng, Lizy K. John, and Andreas Gerstlauer
    Design Automation Conference (DAC). (June 2016)
  • Prefetching Techniques for Near-memory Throughput Processors
    Reena Panda, Yasuko Eckert, Nuwan Jayasena, Onur Kayiran, Michael Boyer, and Lizy K. John
    The ACM International Conference on Supercomputing (ICS). (June 2016)
  • Dynamic Core Allocation and Packet Scheduling in Multi Core Network Processors
    Muhanmmad Faisal Iqbal, Jim Holt, Jee Ho Ryoo, Gustavo de Veciana, and Lizy K. John
    IEEE Transactions on Computers. (2016)

2015

  • Data Partitioning Strategies for Graph Workloads on Heterogeneous Clusters
    Michael LeBeane, Shuang Song, Reena Panda, Jee Ho Ryoo, and Lizy K. John
    The IEEE International Conference for High Performance Computing, Networking, Storage and Analysis (SC). (November 2015)
  • Performance Characterization of Modern Databases on Out-of-order CPUsPDF
    Reena Panda, Christopher Erb, Michael LeBeane, Jee Ho Ryoo, and Lizy K. John
    The IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). (October 2015)
  • WattWatcher: Fine-Grained Power Estimation For Emerging WorkloadsPDF
    Michael LeBeane, Jee Ho Ryoo, Reena Panda, and Lizy K. John
    The IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). (October 2015)
  • i-MIRROR: A Software Managed Die-Stacked DRAM-Based Memory SubsystemPDF
    Jee Ho Ryoo, Karthik Ganesan, Yaomin Chen, and Lizy K. John
    The IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). (October 2015)
  • GPGPU Benchmark Suites: How Well Do They Sample the Performance Spectrum (Best Paper Runner-Up)PDF
    Jee Ho Ryoo, Saddam Quirem, Michael LeBeane, Reena Panda, Shuang Song, and Lizy K. John
    The IEEE International Conference on Parallel Processing (ICPP). (September 2015)
  • WattWatcher: Fine-Grained Power Estimation on Live Multicore Systems Using Configurable Models (Best in Session)
    Michael LeBeane, Jee Ho Ryoo, Reena Panda, and Lizy K. John
    SRC TECHCON. (September 2015)
  • Learning-basd Analytical Cross-Platform Performance Prediction (Best Paper Award)PDF
    Xinnian Zheng, Pradeep Ravikumar, Lizy K. John, and Andreas Gerstlauer
    The IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS). (July 2015)
  • PowerTrain: A Learning-based Calibration of McPAT Power ModelsPDF
    Wooseok Lee, Youngchun Kim, Jee Ho Ryoo, Dam Sunwoo, Andreas Gerstlauer, and Lizy K. John
    The IEEE International Symposium on Low Power Electronics and Design (ISLPED). (July 2015)
  • Big Versus Little: Who Will Trip?PDF
    Reena Panda, Christopher Erb, and Lizy K. John
    Silicon Errors in Logic - System Effects (SELSE). (March 2015)
  • GPGPU-MiniBench: Accelerating GPGPU Micro-Architecture Simulation
    Zhibin Yu, Lieven Eeckhout, Nilanjan Goswami, Tao Li, Lizy K. John, Hai Jin, Chengzhong Xu, and Junmin Wu
    IEEE Transactions on Computers. (2015)
  • Mechanistic Modeling of Architectural Vulnerability Factor
    Arun Nair, Stijn Eyerman, Jian Chen, Lizy K. John, and Lieven Eeckhout
    ACM Transaction on Computer Systems. (2015)

2014

  • Data Analytics Workloads: Characterization and Similarity Analysis
    Reena Panda and Lizy K. John
    The IEEE International Performance Computing and Communications Conference (IPCCC). (December 2014)
  • Performance Analysis of HPC Applications with Irregular Tree Data StructuresPDF
    Ahmed Khawaja, Jiajun Wang, Andreas Gerstlauer, Lizy K. John, Dhairya Malhotra, and George Biros
    The IEEE International Conference on Parallel and Distributed Systems (ICPADS). (December 2014)
  • Control Flow Behavior of Cloud Workloads (Poster)
    Jee Ho Ryoo, Michael LeBeane, Muhammad Faisal Iqbal, and Lizy K. John
    The IEEE International Symposium on Workload Characterization (IISWC). (October 2014)
  • Automatic Generation of Miniaturized Synthetic Proxies for Target Applications to Efficiently Design Multicore Processors
    Karthik Ganesan and Lizy K. John
    IEEE Transactions on Computers. (April 2014)
  • Cache Friendliness Aware Management of Last-level Caches for High Performance Multi-core Systems
    Dimitris Kaseridis, Muhammad Faisal Iqbal, and Lizy K. John
    IEEE Transactions on Computers. (April 2014)
  • FastSpot: Host-Compiled Thermal Estimation for Early Design Space ExplorationPDF
    Darshan Gandhi, Andreas Gerstlauer, and Lizy K. John
    The IEEE International Symposium on Quality Electronic Design (ISQED). (March 2014)
  • Predictive Heterogeneity-Aware Application Scheduling for Chip MultiprocessorsPDF
    Jian Chen, Arun A. Nair, and Lizy K. John
    IEEE Transactions on Computer. (February 2014)

2013

  • Performance Boosting under Reliability and Power ConstraintsPDF
    Youngtaek Kim, Lizy K. John, Indrani Paul, Srilatha Manne, and Michael Schulte
    The IEEE/ACM International Conference on Computer-Aided Design (ICCAD). (November 2013)
  • Flow Migration on Multicore Network Processors: Load Balancing While Minimizing Packet ReorderingPDF
    Muhammad Faisal Iqbal, Jim Holt, Jee Ho Ryoo, Gustavo de Veciana, and Lizy K. John
    The IEEE International Conference on Parallel Processing (ICPP). (October 2013)
  • Workload-Aware Network Processors: Improving Performance While Minimizing Power ConsumptionPDF
    Muhammad Faisal Iqbal
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (August 2013)
  • Store-Load Branch (SLB) Predictor: A Compiler Assisted Branch Prediction for Data Dependent BranchesPDF
    Muhammad Umar Farooq, Khubaib, and Lizy K. John
    The 19th IEEE International Symposium on High Performance Computer Architecture. (March 2013)
  • Cache Friendliness Aware Management of Last-level Caches for High Performance Multi-core SystemsPDF
    Dimitris Kaseridis, Muhammad Faisal Iqbal, and Lizy K. John
    IEEE Transactions on Computer. (January 2013)
  • Automating Stressmark Generation for testing Processor Voltage Fluctuations
    Youngtaek Kim, Sanjay Pant, Srilatha Manne, Micheal Schulte, W. Lloyd Bircher, Madhu Saravana Sibi Govindan, and Lizy K. John
    IEEE Micro. (2013)

2012

  • AUDIT: Stress Testing the Automatic WayPDF
    Youngtaek Kim, Sanjay Pant, Srilatha Manne, Michael Schulte, W. Lloyd Bircher, Madhu Saravana Sibi Govindan, and Lizy K. John
    The 45th International Symposium on Microarchitecture (MICRO'45). (December 2012)
  • Performance Impact of Virtual Machine Placement in a DatacenterPDF
    Indrani Paul, Sudhakar Yalamanchili, and Lizy K. John
    The 31st International Performance Computing and Communications Conference. (December 2012)
  • Efficient Traffic Aware Power Management for Multicore Communications ProcessorsPDF
    Muhammad Faisal Iqbal and Lizy K. John
    Symposium on Architectures for Networking and Communication Systems (ANCS). (October 2012)
  • Impact of compiler optimizations on voltage droops and reliability of an SMT, multi-core processorPDF
    Youngtaek Kim and Lizy K. John
    The 1st International Workshop on Secure and Resilient Architectures and Systems (SRAS) in conjunction with PACT 2012. (September 2012)
  • Predictive Hetrogeneity-Aware Application Scheduling for Chip MultiprocessorsPDF
    Jian Chen, Arun A. Arun, and Lizy K. John
    IEEE Transactions on Computer. (August 2012)
  • A First-Order Mechanistic Model for Architectural Vulnerability FactorPDF
    Arun A. Nair, Stijn Eyerman, Lieven Eeckhout, and Lizy K. John
    The 39th Interenational Symposium on Computer Architecture (ISCA-39). (June 2012)
  • Efficient Modeling of Soft Error Vulnerability in MicroprocessorsPDF
    Arun Arvind Nair
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2012)
  • The Feasibility of Memory Encryption and AuthenticationPDF
    Donald Edward Owen Jr.
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2012)
  • Complete System Power Estimation using Processor Performance EventsPDF
    W. Lloyd Bircher and Lizy K. John
    IEEE Transactions on Computers. (April 2012)
  • Power and Performance Analysis of Network Traffic Prediction Techniques PDF
    Muhammad Faisal Iqbal and Lizy K. John
    IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). (April 2012)
  • Automated di/dt stressmark generation for microprocessor power distribution networksPDF
    Youngtaek Kim and Lizy K. John
    Silicon Errors in Logic - System Effects (SELSE). (March 2012)
  • Compiler Support for Value-based Indirect Branch PredictionPDF
    Muhammad Umar Farooq, Lei Chen, and Lizy K. John
    The 21st International Conference on Compiler Construction (CC). (March 2012)
  • Core-Level Activity Prediction for Multicore Power ManagementPDF
    W. Lloyd Bircher and Lizy K. John
    To appear in IEEE on Emerging and Selected Topics in Circuits and Systems. (2012)

2011

  • Automatic Generation of Synthetic Workloads for Multicore SystemsPDF
    Karthik Ganesan
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (December 2011)
  • Minimalist Open-page: A DRAM Page-mode Scheduling Policy for the Many-core Era (Best Paper Nominee)PDF
    Dimitris Kaseridis, Jeffrey Stuecheli, and Lizy K. John
    44th International Symposium on Microarchitecture (MICRO'44) . (December 2011)
  • Autocorrelation Analysis: A New and Improved Method for Branch Predictability CharacterizationPDF
    Jian Chen and Lizy K. John
    IEEE International Symposium on Workload Characterization . (November 2011)
  • MAximum Multicore POwer (MAMPO) - An Automatic Multithreaded Synthetic Power Virus Generation Framework for Multicore Systems (Best paper finalist)PDF
    Karthik Ganesan and Lizy K. John
    in the SuperComputing conference (SC 2011). (November 2011)
  • MCFQ: Leveraging Memory-level Parallelism and Application's Cache Friendliness for Efficient Management of Quasi-partitioned Last-level Caches (Poster)PDF
    Dimitris Kaseridis, Muhammad Faisal Iqbal, Jeffrey Stuecheli, and Lizy John
    Parallel Architecture and Compilation Techniques (PACT). (October 2011)
  • Automated di/dt stressmark generation for microprocessor power delivery networksPDF
    Youngtaek Kim and Lizy K. John
    The International Symposium on Low Power Electronics and Design (ISLPED). (August 2011)
  • Autocorrelation Analysis: A New and Improved Method for Measuring Branch Predictability PDF
    Jian Chen and Lizy K. John
    International Symposium on Measurement and Modeling of Computer System (SIGMETRICS) . (June 2011)
  • Modeling Program Resource Demand Using Inherent Program CharacteristicsPDF
    Jian Chen, Lizy K. John, and Dimitris Kaseridis
    International Symposium on Measurement and Modeling of Computer System (SIGMETRICS) . (June 2011)
  • Predictive Coordination of Multiple On-chip Resources for Chip MultiprocessorsPDF
    Jian Chen and Lizy K. John
    The 25th International Symposium on Supercomputing (ICS) . (June 2011)
  • Mitigating DRAM Complexities Through Coordinated Scheduling PoliciesPDF
    Jeffrey Adam Stuecheli
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2011)
  • Resource Management for Efficient Single IS Heterogeneous ComputingPDF
    Jian Chen
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2011)
  • The Use of Memory State Knowledge to Improve Computer Memory System OrganizationPDF
    Ciji Isen
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2011)
  • Coordinating DRAM and Last-Level-Cache Policies with the Virtual Write Queue
    Jeffery Stuecheli, Dimitris Kaseridis, Lizy K. John, David Daly, and Hillery C. Hunter
    IEEE Micro. Vol. 31. No. 1. pp 90-98. (January 2011)
  • Core-Level Activity Prediction for Multi-Core Power Management
    William Lloyd Bircher and Lizy K. John
    IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS). (2011)

2010

  • AVF Stressmark: Towards an Automated Methodology for Bounding the Worst-case Vulnerability to Soft ErrorsPDF
    Arun A. Nair, Lizy K. John, and Lieven Eeckhout
    The 43rd Interenational Symposium on Microchitecture. (December 2010)
  • Confusion by All Means (A Study on Benchmark Means)PDF
    Muhammad Faisal Iqbal and Lizy K. John
    Workshop on Unique Chips and Systems (UCAS) in conjunction with the 43rd IEEE/ACM International Symposium on Microarchitecture. (December 2010)
  • Elastic Refresh: Techniques to Mitigate Refresh Penalties in High Density MemoryPDF
    Jeff Stuecheli, Dimitris Kaseridis, David Daly, Hillery Hunter, and Lizy K. John
    The 43rd Interenational Symposium on Microchitecture. (December 2010)
  • Predictive Power Management for Multi-Core ProcessorsPDF
    William Lloyd Bircher
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (September 2010)
  • System-level Max Power (SYMPO) - A Systematic Approach for Escalating System Level Power Consumption Using Synthetic BenchmarksPDF
    Karthik Ganesan, Jungho Jo, W. Lloyld Bircher, Dimitrics Kaseridis, Zhibin Yu, and Lizy K. John
    in 19th International Conference on Parallel Architecture and Compilation Techniques (PACT). (September 2010)
  • The Virtual Write Queue: Coordinating DRAM and Last-Level Cache PoliciesPDF
    Jeff Stuecheli, Dimitris Kaseridis, David Daly, Hillery Hunter, and Lizy K. John
    The 37th Interenational Symposium on Computer Architecture. (June 2010)
  • Synthesizing Memory-Level Parallelism Aware Miniature Clones for SPEC CPU2006 and ImplantBench WorkloadsPDF
    Karthik Ganesan, Jungho Jo, and Lizy K. John
    2010 International Symposium on Performance Analysis of Systems and Software. (March 2010)
  • Bandwidth-aware Memory-subsystem Resource Management using Non-invasive Resource Profilers for Large CMP Systems PDF
    Dimitris Kaseridis, Jeffrey Stuecheli, Jian Chen, and Lizy K. John
    The 16th International Symposium on High-performance Computer Architecture . (January 2010)
  • Value Based BTB Indexing (VBBI) for Indirect Jump Prediction (Best Paper Nominee)PDF
    Muhammad Umar Farooq, Lei Chen, and Lizy K. John
    The 16th Interenational Symposium on High-Performance Computer Architecture. (January 2010)

2009

  • ESKIMO - Energy Savings using Semantic Knowledge of Inconsequential Memory Occupancy for DRAM subsystemPDF
    Ciji Isen and Lizy K. John
    The 42nd Annual IEEE/ACM International Symposium on Microarchitecture. (December 2009)
  • Bank-aware Dynamic Cache Partitioning for Multicore Architectures (Best Paper Award)PDF
    Dimitris Kaseridis, Jeffrey Stuecheli, and Lizy K. John
    The 38th International Conference on Parallel Processing . (September 2009)
  • TSS:Applying Two Stage Sampling in Micro-architecture SimulationsPDF
    Zhibin Yu, Hai Jin, Jian Chen, and Lizy K. John
    17th International Symposium on Modelling, Analysis and Simulation of Computer and Telecommunication Systems . (September 2009)
  • Efficient Program Scheduling for Heterogeneous Multi-core ProcessorsPDF
    Jian Chen and Lizy K. John
    46th Design Automation Conference. (July 2009)
  • Enhanced Hierarchical Instruction Scheduling for Tiled Dataflow Architectures PDF
    Muhammad Umar Farooq and Lizy K. John
    Interenational Conference on Compiler Construction. (March 2009)
  • A Tale of Two Processors: Revisiting the RISC-CISC DebatePDF
    Ciji Isen and Lizy John
    2009 SPEC Benchmark Workshop. (January 2009)
  • Compiler Controlled Speculation for Power Aware ILP Extraction in Dataflow Architecdtures PDF
    Muhammad Umar Farooq, Lizy K. John, and Margarida F. Jacome
    4th Interenational Conference on High Performance and Embedded Architectures and Compilers. (January 2009)
  • Generation,Validation and Analysis of SPEC CPU2006 Simulation Points Based on Branch, Memory, and TLB CharacteristicsPDF
    Karthik Ganesan, Deepak Panwar, and Lizy John
    2009 SPEC Benchmark Workshop. (January 2009)
  • Embedded Java Benchmark Analysis on the ARM Processor
    Ciji Isen, Hari Angepat, Lizy K. John, Choi Jung Pil, and Hyo Jung Song
    International Journal on Embedded Systems. (2009)
  • Hardware acceleration for media / transaction applications in Network Processors
    Byeong Kil Lee and Lizy K. John
    IEEE Transactions on VLSI. (2009)

2008

  • Simulation Points for SPEC 2006PDF
    Arun A. Nair and Lizy John
    International Conference on Computer Design (ICCD'08). (October 2008)
  • A Performance Counter Based Workload Characterization on BlueGene/PPDF
    Karthik Ganesan, Lizy K. John, James Sexton, and Valentina Salapura
    37th International Conference on Parallel Processing. (September 2008)
  • Energy-aware Application Scheduling on a Heterogeneous Multi-core SystemPDF
    Jian Chen and Lizy K. John
    IEEE International Symposium on Workload Characterization. (September 2008)
  • On the Representativeness of Embedded Java BenchmarksPDF
    Ciji Isen, Lizy K. John, Jung Pil Choi, and Hyo Jung Song
    IEEE International Symposium on Workload Characterization. (September 2008)
  • Analyzing and Improving Clustering Based Sampling for Microprocessor Simulation
    Yue Luo, Ajay Joshi, Aashish Phansalkar, Lizy K. John, and Joydeep Ghosh
    International Journal of High Performance Computing and Networking. (August 2008)
  • Analysis of Dynamic Power Management on Multi-core Processors PDF
    W. Lloyd Bircher and Lizy John
    22th ACM Interenational Conference on Supercomputing. (June 2008)
  • Next-Generation Performance Counters: Monitoring Over Thousand Concurrent EventsPDF
    Valentina Salapura, Karthik Ganesan, Alan Gara , Michael Gschwind, James C. Sexton, and Robert E. Walkup
    2008 International Symposium on Performance Analysis of Systems and Software. (April 2008)
  • Automated Microprocessor Stressmark GenerationPDF
    Ajay Joshi, Lieven Eeckhout, Lizy K. John, and Ciji Isen
    The 14th International Symposium on High Performance Computer Architecture (HPCA) . (February 2008)
  • On the Object Orientedness of C++ Programs in SPEC CPU 2006PDF
    Ciji Isen and Lizy John
    2008 SPEC Benchmark Workshop. (January 2008)
  • The Return of Synthetic BenchmarkPDF
    Ajay M. Joshi, Lieven Eeckhout, and Lizy John
    2008 SPEC Benchmark Workshop. (January 2008)
  • Distilling the Essence of Proprietary Workloads into Miniature Benchmarks
    Ajay Joshi, Lieven Eeckhout, Robert H. Bell Jr., and Lizy K. John
    ACM Transactions on Architecture and Code Optimization (TACO). (2008)

2007

  • Constructing Adaptable and Scalable Synthetic Benchmarks for Microprocessor Performance EvaluationPDF
    Ajay M. Joshi
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (December 2007)
  • Applying Statistical Sampling for Fast and Efficient Simulation of Commercial Workloads
    Ajay Joshi, Yue Luo, and Lizy John
    IEEE Transactions on Computers. pp 1520-1533. (November 2007)
  • Analysis of Redundency and Application Balance in the SPEC CPU2006 Benchmark SuitePDF
    Aashish Phansalkar, Ajay Joshi, and Lizy K. John
    The 34th International Symposium on Computer Architecture (ISCA) . (June 2007)
  • Measuring Program Similarity for Efficient Benchmarking and Performance Analysis of Computer SystemsPDF
    Aashish S. Phansalkar
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2007)
  • Complete System Power Estimation: A Trickle-Down Approach Based on Performance EventsPDF
    W. Lloyd Bircher and Lizy K.John
    International Symposium on Performance Analysis of Systems and Software. (April 2007)
  • Mapping of Applications to Heterogeneous Multi-cores Based on Micro-architecture Independent CharacteristicsPDF
    Jian Chen, Nidhi Nayyar, and Lizy K. John
    Third Workshop on Unique Chips and Systems,ISPASS2007. (April 2007)
  • CMP/CMT Scaling of SPECjbb2005 on UltraSPARC T1PDF
    Dimitris Kaseridis and Lizy K. John
    Tenth Workshop on Computer Architecture Evaluation using Commercial Workloads. (February 2007)
  • Hardware Efficient Piecewise Linear Branch PredictorPDF
    Jiajin Tu, Jian Chen, and Lizy K. John
    20th International Conference on VLSI Design. (January 2007)

2006

  • Evaluating Benchmark Subsetting ApproachesPDF
    Joshua J.Yi, Resit Sendag, Lieven Eeckhout, Ajay Joshi, David J. Lilja, and Lizy K. John
    International Symposium on Workload Characterization. (October 2006)
  • Performance Cloning: A Technique for Disseminating Proprietary Applications as BenchmarksPDF
    Ajay Joshi, Lieven Eeckhout, Robert H.Bell Jr., and Lizy K. John
    International Symposium on Workload Characterization. (October 2006)
  • The DaCapo Benchmarks:Java Benchmarking Development and AnalysisPDF
    Stephen M.Blackburn, Robin Garner, Chris Hoffmann, Asjad M. Khan, Kathryn S. McKinley, Rotem Bentzur, Amer Diwan, Daniel Feinberg, Daniel Frampton, Samuel Z.Guyer, Martin Hirzel, Antony Hosking, Maria Jump, Han Lee, J Eliot B Moss, Aashish Phansalkar, Darko Stefanovic, Thomas VanDrunen, Daniel von Dincklage, and Ben Wiedermann
    Object Oriented Programming Systems,Languages and Applications 2006(OOPSLA'06). (October 2006)
  • Performance Prediction Based on Inherent Program SimilarityPDF
    Kenneth Hoste, Aashish Phansalkar, Lieven Eeckhout, Andy Georges, Lizy K. John, and Koen De Bosschere
    15th International Conference on Parallel Architecture and COmpilation Techniques (PACT) . (September 2006)
  • Avoiding Store Misses To Fully Modified Cache BlocksPDF
    Shiwen Hu and Lizy K. John
    IEEE International Performance Computing and Communications Conference. (April 2006)
  • OS-aware Tuning: Improving Instruction Cache Energy Efficiency on System WorkloadsPDF
    Tao Li and Lizy K. John
    IEEE International Performance Computing and Communications Conference. (April 2006)
  • Automatic Testcase Synthesis and Performance Model Validation for High Performance PowerPC ProcessorsPDF
    Robert H. Bell, Jr, Rajiv R. Bhatia, Lizy K. John, Jeff Stuecheli, John Griswell, Paul Tu, Louis Capps, Anton Blanchard, and Ravel Thai
    IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). (March 2006)
  • Evaluating the Efficacy of Statistical Simulation for Early Design Space Exploration
    Ajay Joshi, Joshua Yi, Robert H. Bell, Jr, Lieven Eeckhout, Lizy K. John, and David Lilja
    IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). (March 2006)
  • Measuring Benchmark Similarity Using Inherent Program CharacteristicsPDF
    Ajay Joshi, Aashish Phansalkar, Lieven Eeckhout, and Lizy John
    Tech Report TR-060201-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-060201-01. (February 2006)
  • Analyzing the Processor Bottlenecks in SPEC CPU 2000PDF
    Joshua J. Yi, Ajay Joshi, Resit Sendag, Lieven Eeckhout, and David J. Lilja
    2006 SPEC Benchmark Workshop. (January 2006)
  • Performance Prediction Using Program SimilarityPDF
    Aashish Phansalkar and Lizy John
    2006 SPEC Benchmark Workshop. (January 2006)
  • Analyzing and Improving Clustering Based Sampling for Microprocessor Simulation
    Yue Luo, Ajay Joshi, Aashish Phansalkar, Lizy K. John, and Joydeep Ghosh
    Accepted in International Journal of High Performance Computing and Networking. Vol. . No. . pp -. (2006)
  • Architectural Enhancements for Network Congestion Control Applications
    Byeong Kil Lee, , Lizy K. John, and Eugene John
    Accepted at IEEE Transactions on VLSI. Vol. . No. . pp -. (2006)
  • Measuring Benchmark Similarity Using Inherent Program Characteristics
    Ajay Joshi, Aashish Phansalkar, Lieven Eeckhout, and Lizy K. John
    Accepted at IEEE Transactions on Computers. Vol. . No. . pp -. (2006)
  • OS-aware Branch Prediction: Improving Microprocessor Control Flow Prediction for Operating Systems
    Tao Li, Lizy K. John, Anand Sivasubramaniam, Narayanan Vijaykrishnan, and Juan Rubio
    Accepted at IEEE Transactions on Computers. Vol. . No. . pp -. (2006)
  • Operating System Power Minimization through Run-time Processor Resource AdaptationPDF
    Tao Li and Lizy K. John
    Journal of Microprocessor and Microsystems. Vol. 30. No. 4. pp 173-224. (2006)

2005

  • Automatic Workload Synthesis for Early Design Studies and Performance Model ValidationPDF
    Robert H. Bell, Jr
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (December 2005)
  • Efficient Adaptation of Multiple Microprocessor Resources for Energy Reduction Using Dynamic OptimizationPDF
    Shiwen Hu
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (December 2005)
  • Analyzing and Improving Clustering Based Sampling for Microprocessor SimulationPDF
    Yue Luo, Ajay Joshi, Aashish Phansalkar, Lizy John, and Joydeep Ghosh
    17th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). (October 2005)
  • Efficient Power Analysis using Synthetic TestcasesPDF
    Robert H. Bell, Jr. and Lizy K. John
    IEEE International Symposium on Workload Characterization. (October 2005)
  • Reducing Server Data Traffic using a Hierarchical Computation Model
    Juan Rubio and Lizy K. John
    IEEE Transactions on Parallel and Distributed Systems. Vol. 16. No. 10. pp 933-943. (October 2005)
  • Simulating Commercial Java Throughput Workloads: A Case Study
    Yue Luo and Lizy John
    International Conference on Computer Design (ICCD'05). (October 2005)
  • Improving Sampled Microprocessor SimulationPDF
    Yue Luo
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (August 2005)
  • Network Processor Design: Benchmarks and Architectural AlternativesPDF
    Byeong Kil Lee
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (August 2005)
  • Runtime Identification of Microprocessor Energy Saving OpportunitiesPDF
    W. Lloyd Bircher, Madhavi Valluri, Lizy John, and Jason Law
    International Symposium on Low Power Electronics and Design. pp 275-280. (August 2005)
  • Architectural Support for Accelerating Congestion Control Applications in Network Processors
    Byeong Kil Lee, Lizy K. John, and Eugene John
    IEEE 16th International Conference on Application-specific Systems, Architectures and Processors (ASAP 2005). (July 2005)
  • Implications of Executing Compression and Encryption Applications on General Purpose Processors
    Byeong Kil Lee and Lizy K. John
    IEEE Transactions on Computers. Vol. 54. No. 7. pp 917-922. (July 2005)
  • Simulating Java Commercial Throughput Workload: A Case StudyPDF
    Yue Luo and Lizy John
    Tech Report TR-050710-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-050710-01. (July 2005)
  • Adapting Branch-Target Buffer to Improve the Target Predictability of Java Code
    Tao Li, Ravi Bhargava, and Lizy K. John
    ACM Transactions on Architecture and Code Optimization (TACO) . Vol. 2. No. 2. (June 2005)
  • Improved Automatic Testcase Synthesis for Performance Model ValidationPDF
    Robert H. Bell, Jr. and Lizy K. John
    19th ACM International Conference on Supercomputing. (June 2005)
  • Low Power, Low Complexity Instruction Issue Using Compiler AssistancePDF
    Madhavi Valluri, Lizy K. John, and Kathryn McKinley
    19th ACM International Conference on Supercomputing. (June 2005)
  • The Case for Automatic Synthesis of Miniature BenchmarksPDF
    Robert H. Bell Jr. and Lizy K. John
    Workshop on Modeling, Benchmarking, and Simulation (held with ISCA-32). (June 2005)
  • Lieven Eeckhout, Yue Luo, Koen De Bosschere, and Lizy K. John
    The Computer Journal. Vol. 48. No. 4. pp 451-459. (May 2005)
  • A Hybrid-Scheduling Approach for Energy-Efficient Superscalar ProcessorsPDF
    Madhavi Valluri
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2005)
  • Analyzing and Improving Clustering Based Sampling for Microprocessor SimulationPDF
    Yue Luo, Ajay Joshi, Aashish Phansalkar, Lizy John, and Joydeep Ghosh
    Tech Report TR-050301-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-050301-01. (March 2005)
  • Effective Adaptive Computing Environment Management via Dynamic OptimizationPDF
    Shiwen Hu, Madhavi Valluri, and Lizy K. John
    International Symposium on Code Generation and Optimization. (March 2005)
  • Measuring Program Similarity: Experiments with SPEC CPU Benchmark SuitesPDF
    Aashish Phansalkar, Ajay Joshi, Lieven Eeckhout, and Lizy K. John
    IEEE International Symposium on Performance Analysis of Systems and Software. (March 2005)
  • Measuring Program SimilarityPDF
    Aashish Phansalkar, Ajay Joshi, Lieven Eeckhout, and Lizy K. John
    Tech Report TR-050127-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-050127-01. (January 2005)
  • Computer Performance Evaluation and Benchmarking
    Edited by Lizy John and Lieven Eeckhout
    CRC Press. ( 2005)

2004

  • Effective Use of Performance Monitoring Counters for Run-Time Prediction of PowerPDF
    W. L. Bircher, Jason Law, Madhavi Valluri, and Lizy K. John
    Tech Report TR-041104-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-041104-01. (November 2004)
  • Four Generations of SPEC CPU Benchmarks: What has changed and what has notPDF
    Aashish Phansalkar, Ajay Joshi, Lieven Eeckhout, and Lizy K. John
    Tech Report TR-041026-01-1. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-041026-01-1. (October 2004)
  • Improving Server Performance on Transaction Processing Workloads by Enhanced Data PlacementPDF
    Juan Rubio, Charles Lefurgy, and Lizy K. John
    16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). (October 2004)
  • Self-Monitored Adaptive Cache Warm-Up for Microprocessor SimulationPDF
    Yue Luo, Lizy K. John, and Lieven Eeckhout
    16th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). (October 2004)
  • Efficiently Evaluating Speedup Using Sampled Processor SimulationPDF
    Yue Luo and Lizy K. John
    Computer Architecture Letters. Vol. 3. (September 2004)
  • Experiments in Automatic Benchmark SynthesisPDF
    Robert H. Bell, Jr. and Lizy K. John
    Tech Report TR-040817-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-040817-01. (August 2004)
  • Exploring the Potential of a Hierarchical Computing Model for a Commercial ServerPDF
    Juan Rubio
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (August 2004)
  • OS-aware Architecture for Improving Microprocessor Performance and Energy EfficiencyPDF
    Tao Li
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (August 2004)
  • Analysis of the Execution of a Next Generation Application on Superscalar and Grid ProcessorsPDF
    Juan Rubio and Lizy John
    IEEE International Conference on Parallel and Distributed Systems. (July 2004)
  • Scaling to the End of Silicon with EDGE architectures
    Doug Burger, Steve Keckler, Katherine S. McKinley, M. Dahlin, Lizy K. John, Calvin Lin, C. R. Moore, J. Burrill, Robert G. McDonald, William Yoder, and The TRIPS team
    IEEE Computer. pp 44-55. (July 2004)
  • Control Flow Modeling in Statistical Simulation for Accurate and Efficient Processor Design StudiesPDF
    Lieven Eeckhout, Robert H. Bell, Jr., Bastiaan Stougie, Koen De Bosschere, and Lizy K. John
    International Symposium on Computer Architecture (ISCA). pp 350-361. (June 2004)
  • Deconstructing and Improving Statistical Simulation in HLSPDF
    Robert H. Bell Jr., Lieven Eeckhout, Lizy K. John, and Koen De Bosschere
    3rd Annual Workshop on Duplicating, Deconstructing, and Debunking (WDDD). (June 2004)
  • Locality Based On-Line Trace Compression
    Yue Luo and Lizy K. John
    IEEE Transactions on Computers. Vol. 53. No. 6. pp 723-731. (June 2004)
  • Understanding the data memory behavior of benchmarks using Principal Components AnalysisPDF
    Saket Kumar
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2004)
  • Hybrid-Scheduling: A Compile-Time Approach for Energy-Efficient Superscalar Processors (poster)PDF
    Madhavi Valluri and Lizy John
    IBM Austin Conference on Energy-Efficient Design (ACEED) 2004. (March 2004)
  • More on Finding a Single Number to Indicate Overall Performance of a Benchmark Suite
    Lizy K. John
    ACM Computer Architecture News. Vol. 32. No. 1. pp 3-8. (March 2004)
  • Keynote SpeechPDF
    Lizy K. John
    Seventh Workshop on Computer Architecture Evaluation Using Commercial Workloads (CAECW-7). (February 2004)
  • Using Statistical Theory to Study Issues in Microprocessor SimulationPDF
    Yue Luo and Lizy K. John
    Tech Report TR-0400225-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-0400225-01. (February 2004)
  • Using Statistical Theory to Study Issues in Microprocessor SimulationPDF
    Yue Luo and Lizy K. John
    5th Annual Austin Center for Advanced Studies Conference. (February 2004)
  • Analyzing Program Behavior of SPECint2000 Benchmark Suite using Principal Components AnalysisPDF
    Aashish Phansalkar and Lizy K. John
    Tech Report TR-040122-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-040122-01. (January 2004)
  • More on finding a Single Number to indicate Overall Performance of a Benchmark SuitePDF
    Lizy K. John
    Tech Report TR-040126-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-040126-01. (January 2004)
  • Power Modeling in SDRAMsPDF
    Ajay Joshi, Srirarm Sambamurthy, Saket Kumar, and Lizy John
    Tech Report TR-040126-02. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-040126-02. (January 2004)

2003

  • Characterizing Microprocessor Benchmarks Towards Understanding the Workload Design SpacePDF
    Michael Arunkumar
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (December 2003)
  • Memory Access and Computational Behavior of MP3 EncodingPDF
    Michael Lance Karm
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (December 2003)
  • Solutions to High-End Signal Processing Applications
    Patrick James Peters
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (December 2003)
  • Basic Block Simulation Granularity, Basic Block Maps, and Benchmark Synthesis Using Statistical SimulationPDF
    Robert H. Bell, Jr. and Lizy K. John
    Tech Report TR-031119-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-031119-01. (November 2003)
  • The Role of Return Values in Exploiting Speculative Method-Level Parallelism
    Shiwen Hu, Ravi Bhargava, and Lizy K. John
    The Journal of Instruction-Level Parallelism. Vol. 5. (November 2003)
  • NpBench: A Benchmark Suite for Control Plane and Data Plane Applications for Network ProcessorsPDF
    Byeong Kil Lee and Lizy John
    International Conference on Computer Design (ICCD'03). (October 2003)
  • Bottlenecks in multimedia processing with SIMD style extensions and architectural enhancements
    Deepu Talla, Lizy K. John, and Doug Burger
    IEEE Transactions on Computers. Vol. 52. No. 8. pp 1015-1031. (August 2003)
  • Development and Characterization of Control-plane Network WorkloadsPDF
    Byeong Kil Lee and Lizy K. John
    Tech Report TR-030827-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-030827-01. (August 2003)
  • Exploiting compiler-generated schedules for energy savings in high-performance processorsPDF
    Madhavi Valluri, Lizy John, and Heather Hanson
    International Symposium on Low Power Electronics and Design (ISLPED'03). (August 2003)
  • Facts and myths about media processing on general-purpose processors (Invited Paper)
    Deepu Talla and Lizy John
    IEEE International Conference on Information Technology: Research and Education (Special Session on Technology and Trends in Media Processing). (August 2003)
  • Instruction History Management for High-Performance MicroprocessorsPDF
    Ravi Bhargava
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (August 2003)
  • On Load Latency in Low-Power CachesPDF
    S. Kim, N. Vijaykrishnan, M. J. Irwin, and L. K. John
    International Symposium on Low Power Electronics and Design (ISLPED'03). (August 2003)
  • Routine based OS-aware Microprocessor Resource Adaptation for Run-time Operating System Power SavingPDF
    Tao Li and Lizy John
    International Symposium on Low Power Electronics and Design (ISLPED). (August 2003)
  • Avoiding Store Misses to Fully Modified Cache BlocksPDF
    Shiwen Hu and Lizy K. John
    Tech Report TR-030701-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-030701-01. (July 2003)
  • Using Simulated Annealing to Guide Server Data PlacementPDF
    Juan Rubio and Lizy K. John
    Tech Report TR-030731-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-030731-01. (July 2003)
  • Improving Dynamic Cluster Assignment for Clustered Trace Cache ProcessorsPDF
    Ravi Bhargava and Lizy K. John
    30th International Symposium on Computer Architecture (ISCA'03). pp 264-274. (June 2003)
  • Performance and Energy Impact of Instruction-Level Value Predictor FilteringPDF
    Ravi Bhargava and Lizy K. John
    First Value-Prediction Workshop (VPW1) [held with ISCA'03]. (June 2003)
  • Run-time Modeling and Estimation of Operating System Power ConsumptionPDF
    Tao Li and Lizy John
    International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS). pp 160-171. (June 2003)
  • The Role of Return Values in Exploiting Speculative Method-Level ParallelismPDF
    Shiwen Hu, Ravi Bhargava, and Lizy K. John
    First Value-Prediction Workshop (VPW1) [held with ISCA'03]. (June 2003)
  • Cluster Assignment Strategies for a Clustered Trace Cache ProcessorPDF
    Ravi Bhargava and Lizy K. John
    Tech Report TR-030331-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-030331-01. (March 2003)
  • Comparison of JVM Phases on Data Cache Performance
    Shiwen Hu and Lizy K. John
    First Workshop on Managed Run Time Workloads. (March 2003)
  • Automatically Selecting Representative Traces for Simulation Based on Cluster Analysis of Instruction Address HashesPDF
    Yue Luo and Lizy K. John
    4th Annual Austin Center for Advanced Studies Conference. (February 2003)
  • Benchmarking Internet Servers on Superscalar MachinesPDF
    Yue Luo, Juan Rubio, Lizy John, Pattabi Seshadri, and Alex Mericas
    IEEE Computer. pp 34-40. (February 2003)
  • Interface Design Techniques for Single Chip SystemsPDF
    Robert H. Bell, Jr. and Lizy John
    16th IEEE Conference on VLSI Design. (January 2003)

2002

  • Rehashable BTB: An Adaptive Branch Target Buffer to Improve the Target Predictability of Java CodePDF
    Tao Li, Ravi Bhargava, and Lizy John
    9th International Conference on High Performance Computing (HiPC). Lecture Notes in Computer Science. Springer. Vol. 2552. pp 597-608. (December 2002)
  • Cache Performance in Java Virtual Machines: A Study of Constituent PhasesPDF
    Anand Rajan, Shiwen Hu, and Juan Rubio
    5th Annual IEEE International Workshop on Workload Characterization. (November 2002)
  • Run-time Modeling and Estimation of Operating System Power ConsumptionPDF
    Tao Li and Lizy K. John
    Tech Report TR-1101-02. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-1101-02. (November 2002)
  • Workload Characterization of Java Server Applications on Two PowerPC ProcessorsPDF
    Pattabi Seshadri, Lizy John, and Alex Mericas
    3rd Annual Austin Center for Advanced Studies Conference. (November 2002)
  • Modeling and Evaluation of Control Flow Prediction Schemes Using Complete System Simulation and Java WorkloadsPDF
    Tao Li, Lizy John, and Robert H. Bell, Jr.
    10th IEEE/ACM International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS). (October 2002)
  • Understanding and Improving Operating System Effects in Control Flow PredictionPDF
    Tao Li, Lizy John, Anand Sivasubramaniam, Narayanan Vijaykrishnan, and Juan Rubio
    10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X). pp 68-80. (October 2002)
  • A Case Study of 3 Internet Benchmarks on 3 Superscalar MachinesPDF
    Yue Luo, Pattabi Seshadri, Juan Rubio, Lizy K. John, and Alex Mericas
    Tech Report TR-020817-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-020817-01. (August 2002)
  • Access Time and Energy Tradeoffs for Caches in High Frequency MicroprocessorsPDF
    Eugene B. John, Stefan Petko, Lizy John, and Jason Law
    45th IEEE International Midwest Symposium on Circuits and Systems. (August 2002)
  • Access Time and Power Characteristics of Various Future File ConfigurationsPDF
    Jason Law and Byeong Kil Lee
    Tech Report TR-020821-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-020821-01. (August 2002)
  • Cache Performance in Java Virtual Machines: A Study of Constituent PhasesPDF
    Anand S. Rajan, Juan Rubio, and Lizy K. John
    Tech Report TR-020822-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-020822-01. (August 2002)
  • The Role of Return Value Prediction in Exploiting Speculative Method-Level ParallelismPDF
    Shiwen Hu, Ravi Bhargava, and Lizy K. John
    Tech Report TR-020822-02. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-020822-02. (August 2002)
  • Implications of Programmable General Purpose Processors for Compression/Encryption ApplicationsPDF
    Byeong Kil Lee and Lizy John
    IEEE 13th International Conference on Application-specific Systems, Architectures and Processors (ASAP 2002). (July 2002)
  • Improving Transaction Processing using a Hierarchical Computing ServerPDF
    Juan Rubio, Madhavi Valluri, and Lizy K. John
    Tech Report TR-020719-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-020719-01. (July 2002)
  • A Hybrid-Scheduling Approach for Low-Energy Superscalar Processors
    Madhavi G. Valluri, Lizy K. John, and Heather Hanson
    Tech Report TR-020617-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-020617-01. (June 2002)
  • Access Time and Energy Tradeoffs for Caches in High Frequency MicroprocessorsPDF
    Eugene B. John, Stefan Petko, Lizy K. John, and Jason Law
    Tech Report TR-020607-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-020607-01. (June 2002)
  • Latency and Energy Aware Value Prediction for High-Frequency ProcessorsPDF
    Ravi Bhargava and Lizy John
    16th ACM Interenational Conference on Supercomputing. pp 45-56. (June 2002)
  • Understanding and Improving Operating System Effects in Control Flow PredictionPDF
    Tao Li, Lizy K. John, Anand Sivasubramaniam, and Vijaykrishnan Narayanan
    Tech Report TR-000630-02. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-000630-02. (June 2002)
  • A Study of Cache performance in Java Virtual MachinesPDF
    Anand Sunder Rajan
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2002)
  • An Analysis and Critique of MiBench
    James Yang
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2002)
  • Traveling Speculations: An Integrated Prediction Strategy for Wide-Issue MicroprocessorsPDF
    Ravi Bhargava, Juan Rubio, and Lizy K. John
    Tech Report TR-020524-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-020524-01. (May 2002)
  • Value Prediction Design for High-Frequency MicroprocessorsPDF
    Ravi Bhargava and Lizy K. John
    Tech Report TR-020508-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-020508-01. (May 2002)
  • Implications of Programmable General Purpose Processors for Compression/Encryption ApplicationsPDF
    Byeong Kil Lee and Lizy K. John
    Tech Report LCA-TR-020315. Laboratory for Computer Architecture, The University of Texas at Austin. No. LCA-TR-020315. (March 2002)
  • Using Complete Machine Simulation for Software Power Estimation: The SoftWatt ApproachPDF
    Sudhanva Gurumurthi, Anand Sivasubramaniam, Mary Jane Irwin, Narayanan Vijaykrishnan, Mahmut Kandemir, Tao Li, and Lizy John
    2002 International Symposium on High Performance Computer Architecture. pp 141-150. (February 2002)
  • Improving Java Performance in Embedded and General-Purpose Processors
    Ramesh Radhakrishnan, Lizy John, Ravi Bhargava, and Deepu TallaEdited by Vijaykrishnan Narayanan and Mario L. Wolczko
    Java Microarchitectures. Kluwer Academic Publishers. Ch. 5. pp 79-104. ( 2002)
  • Performance Evaluations: Techniques, Tools, and BenchmarksPDF
    Lizy Kurian John
    Computer Engineering Handbook. CRC Press. ( 2002)

2001

  • Contemporary Performance Evaluation: Overwhelming Effort? Irrelevant Results? (Position paper)
    Lizy John
    NSF workshop. (December 2001)
  • MediaBreeze: A decoupled architecture for accelerating multimedia applicationsPDF
    Deepu Talla and Lizy John
    ACM Computer Architecture News. ACM Press. Vol. 29. No. 5. (December 2001)
  • Workload Characterization of Multithreaded Java Servers on Two PowerPC ProcessorsPDF
    Pattabi Seshadri and Alex Mericas
    4th Annual IEEE International Workshop on Workload Characterization. pp 36-44. (December 2001)
  • CDMA as a Multiprocessor Interconnect StrategyPDF
    Robert H. Bell, Jr., Chang Yong Kang, Lizy John, and Earl E. Swartzlander, Jr.
    35th Asilomar Conference on Signals, Systems, and Computers. (November 2001)
  • Hardware support to reduce overhead in fine-grain media codes
    Deepu Talla, Lizy K. John, and Doug Burger
    Tech Report LCA-TR-011101. Laboratory for Computer Architecture, The University of Texas at Austin. No. LCA-TR-011101. (November 2001)
  • Understanding Control Flow Transfer and its Predictability in Java ProcessingPDF
    Tao Li and Lizy John
    IEEE International Symposium on Performance Analysis of Systems and Software. pp 65-76. (November 2001)
  • Workload Characterization of Multithreaded Java ServersPDF
    Yue Luo and Lizy John
    IEEE International Symposium on Performance Analysis of Systems and Software. pp 128-136. (November 2001)
  • A decoupled architecture for accelerating multimedia applicationsPDF
    Deepu Talla and Lizy John
    Workshop on Memory Access Decoupled Architectures (held with IEEE International Conference on Parallel Architectures and Compilation Techniques). (September 2001)
  • ADirpNB: A Cost-effective Way to Implement Full Map Directory Based Cache Coherence ProtocolsPDF
    Tao Li and Lizy John
    IEEE Transactions on Computers. Vol. 50. No. 9. pp 921-934. (September 2001)
  • Cost-effective Hardware Acceleration of Multimedia ApplicationsPDF
    Deepu Talla and Lizy John
    IEEE International Conference on Computer Design. pp 415-424. (September 2001)
  • Architectural Techniques to Accelerate Multimedia Applications on General-Purpose ProcessorsPDF
    Deepu Talla
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (August 2001)
  • Workload Characterization of Multithreaded Java Servers
    Yue Luo and Lizy K. John
    Tech Report TR-010815-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-010815-01. (August 2001)
  • Improving Java Performance Using Hardware TranslationPDF
    Ramesh Radhakrishnan, Ravi Bhargava, and Lizy John
    15th ACM International Conference on Supercomputing. pp 427-439. (June 2001)
  • Harvard Architectures
    Lizy Kurian JohnEdited by John G. Webster
    Wiley Encyclopedia of Electrical and Electronics Engineering. John Wiley & Sons. (April 2001)
  • Characterization of Web Server Workloads on Three Generations of IBM PowerPC Microarchitectures
    Pattabi Seshadri and Lizy John
    IBM CAS Conference. pp 14-29. (February 2001)
  • Java Runtime Systems: Characterization and Architectural ImplicationsPDF
    Ramesh Radhakrishnan, N. Vijaykrishnan, Lizy John, A. Sivasubramaniam, Juan Rubio, and Jyotsna Sabarinathan
    IEEE Transactions on Computers. Vol. 50. No. 2. pp 131-146. (February 2001)
  • Hierarchical Computing: An Architecture for Efficient Transaction Processing
    Juan Rubio and Lizy K. John
    Tech Report UT-CERC-TR-01-1. Computer Engineering Research Center, The University of Texas at Austin. No. UT-CERC-TR-01-1. (January 2001)
  • Is Compiling for Performance == Compiling for Power?PDF
    Madhavi Valluri and Lizy John
    5th Annual Workshop on Interaction Between Compilers and Computer Architectures (INTERACT-5) (held with HPCA 2001). (January 2001)
  • Characterizing Operating System Activity in SPECjvm98 Benchmarks
    Tao Li, Lizy John, N. Vijaykrishnan, and A. Sivasubramaniam
    Workload characterization of emerging computer applications. Kluwer Academic Publishers. Ch. 3. pp 53-82. ( 2001)
  • Is Compiling for Performance == Compiling for Power?
    Madhavi Valluri and Lizy JohnEdited by Gyunggho Lee and Pen-Chung Yew
    Interaction Between Compilers and Computer Architectures. Kluwer Academic Publishers. Ch. 6. ( 2001)
  • Understanding the Impact of x86/NT Computing on Microarchitecture
    Ravi Bhargava, Juan Rubio, Srikanth Kannan, Lizy John, David Christie, and Leo Klaes
    Workload characterization of emerging computer applications. Kluwer Academic Publishers. Ch. 10. pp 203-228. ( 2001)
  • Workload characterization of emerging computer applications
    Edited by Lizy John and Ann M. G. Maynard
    Kluwer Academic Publishers. ( 2001)

2000

  • The EASE Branch PredictorPDF
    Serene Banerjee, Lizy K. John, and Brian L. Evans
    Proceedings of International Conference on Communications, Computers, and Devices. (December 2000)
  • Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar ArchitecturesPDF
    Deepu Talla, Lizy John, Victor Lapinskii, and Brian L. Evans
    IEEE International Conference on Computer Design. (September 2000)
  • Microarchitectural Techniques to Enable Efficient Java Execution
    Ramesh Radhakrishnan
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (August 2000)
  • Understanding and Designing for Dependent Store/Load Pairs in High Performance MicroprocessorsPDF
    Ravi Bhargava
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (August 2000)
  • Allowing for ILP in an Embedded Java ProcessorPDF
    Ramesh Radhakrishnan, Deepu Talla, and Lizy John
    International Symposium on Computer Architecture. pp 294-305. (June 2000)
  • An Experiment in Memory Subsystem Performance Modeling and Verification
    Sanjeev Ghai
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2000)
  • Performance Characterization of Intel's Internet Streaming SIMD ExtensionsPDF
    Vikram Godbole
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2000)
  • SUPERLEXAA: An Application Analyzer for x86
    Srikanth Kannan
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 2000)
  • Using Complete System Simulation to Characterize SPECjvm98 BenchmarksPDF
    Tao Li, Lizy John, N. Vijaykrishnan, Anand Sivasubramaniam, Jyotsna Sabarinathan, and A. Murthy
    14th ACM International Conference on Supercomputing. pp 22-33. (May 2000)
  • Issues in the Design of Store Buffers in Dynamically Scheduled ProcessorsPDF
    Ravi Bhargava and Lizy John
    IEEE International Symposium on Performance Analysis of Systems and Software. pp 76-87. (April 2000)
  • Execution Characteristics of Multimedia Applications on a Pentium II ProcessorPDF
    Deepu Talla and Lizy John
    IEEE International Performance, Computing, and Communications Conference. pp 516-524. (February 2000)
  • Architectural Issues in Java Runtime SystemsPDF
    Ramesh Radhakrishnan, N. Vijaykrishnan, Lizy John, and Anand Sivasubramaniam
    International Symposium on High Performance Computer Architecture. pp 387-398. (January 2000)
  • Bus Architectures
    Lizy Kurian JohnEdited by Zainalabedin Navabi and David R. Kaeli
    EOLSS: Encyclopedia of Technology, Information, and Systems Management Resources. UNESCO. Ch. 2. Vol. Computer Science and Engineering. ( 2000)
  • Data Placement Techniques for Interleaved Memories
    Lizy John
    The Computer Journal. Vol. 43. No. 2. pp 138-151. ( 2000)
  • Workload Characterization for Computer System Design
    Edited by Lizy John and Ann M. G. Maynard
    Kluwer Academic Publishers. ( 2000)

1999

  • A Study of Instruction Level Parallelism in Contemporary Computer Applications
    Jyotsna Sabarinathan
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (December 1999)
  • Annex Cache: A Cache Assist to Implement Selective CachingPDF
    Lizy John, Tao Li, and A. Subramanian
    Journal of Microprocessors and Microsystems. Elsevier Science. Vol. 23. No. 8-9. pp 537-551. (December 1999)
  • The Implementation of a High Speed Interconnect for a Server-Oriented Memory Subsystem
    Jody Joyner
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (December 1999)
  • An evolutionary computation embedded IIR LMS algorithmPDF
    Deepu Talla, S. S. Rao, and Lizy John
    International Conference on Signal Processing Applications and Technology. (November 1999)
  • A Decoupled Translate Execute (DTE) Architecture to Improve Performance of Java ExecutionPDF
    Ramesh Radhakrishnan and Lizy John
    Workshop on Hardware Support or Objects and Microarchitectures for Java (held with ICCD-99). (October 1999)
  • Characterization of Java Applications at Bytecode and Ultra-SPARC Machine Code LevelsPDF
    Ramesh Radhakrishnan, Juan Rubio, and Lizy John
    IEEE International Conference on Computer Design. pp 281-284. (October 1999)
  • On the Use of Pseudorandom Sequences for High Speed Resource Allocatiors in Superscalar ProcessorsPDF
    S. Srinivasan and Lizy John
    IEEE International Conference on Computer Design. pp 124-130. (October 1999)
  • Performance Evaluation of Configurable Hardware Features on the AMD-K5PDF
    Mike Clark and Lizy John
    IEEE International Conference on Computer Design. pp 102-107. (October 1999)
  • A Performance Study of Modern Web Applications
    Ramesh Radhakrishnan and Lizy John
    International Euro-Par Conference. Lecture Notes in Computer Science. Springer. Vol. 1685. pp 239-247. (August 1999)
  • Performance Evaluation and Benchmarking of Native Signal Processing
    Deepu Talla and Lizy John
    International Euro-Par Conference. Lecture Notes in Computer Science. Vol. 1685. pp 266-270. (August 1999)
  • Quantifying the effectiveness of MMX in native signal processingPDF
    Deepu Talla and Lizy John
    IEEE Mid-West Symposium on Circuits and Systems. pp 18-21. (August 1999)
  • Execution Characteristics of JIT Compilers
    Ramesh Radhakrishnan, Juan Rubio, N. Vijaykrishnan, and Lizy K. John
    Tech Report TR-990717-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-990717-01. (July 1999)
  • Exploiting SIMD Parallelism in DSP and Multimedia Algorithms using the AltiVec TechnologyPDF
    H. Nguyen and Lizy John
    ACM International Conference on Supercomputing. pp 11-20. (June 1999)
  • Benchmarking CORBA and Java for the Web
    Poorva Murarka
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 1999)
  • Characterization of Java Applications at the ByteCode Level
    Juan Rubio
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 1999)
  • Program Characterization for System Performance Evaluation
    Purnima Vasudevan
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (May 1999)
  • Novel Low Power Static Energy recovery AdderPDF
    Roy Shalem, Eugene John, and Lizy John
    Great Lakes Symposium on VLSI. pp 380-383. (March 1999)
  • Accurately Modeling Speculative Instruction Fetching in Trace-Driven SimulationPDF
    Ravi Bhargava, Lizy John, and Francisco Matus
    IEEE Performance, Computing, and Communications Conference. pp 65-71. (February 1999)
  • Contrasting Branch Characteristics and Branch Predictor Performance of C++ and C Programs
    David Tang, Ann M. G. Maynard, and Lizy John
    IEEE Performance, Computing, and Communications Conference. pp 275-283. (February 1999)
  • The Effects of Memory Access Ordering on Multiple Issue Uniprocessor Performance
    Brian Grayson, Lizy John, and Craig Chase
    IEEE Performance, Computing, and Communications Conference. pp 293-302. (February 1999)
  • Formal Verification of Snoop Based Cache Coherence Protocol Using Symbolic Model Checking
    S. Srinivasan, P. Chabra, P. Jaini, Adnan Aziz, and Lizy John
    12th International Conference on VLSI Design. pp 288-293. (January 1999)
  • Web Workload Characterization at a Microarchitectural Level
    Ramesh Radhakrishnan and Lizy John
    2nd Workshop on Computer Architecture Evaluation using Commercial Workloads (held with HPCA-5). (January 1999)
  • Bit-Slice Computers
    Lizy K. John and Eugene B. JohnEdited by John G. Webster
    Wiley Encyclopedia of Electrical and Electronics Engineering. John Wiley & Sons. ( 1999)
  • Dynamically Adjustable Memory Chips
    Lizy John
    VLSI Design Journal. Vol. 10. No. 2. pp 203-215. ( 1999)

1998

  • Evaluating MMX Technology Using DSP and Multimedia ApplicationsPDF
    Ravi Bhargava, Lizy John, Brian L. Evans, and Ramesh Radhakrishnan
    IEEE Symposium on Microarchitecture. pp 37-46. (December 1998)
  • Execution Characteristics of Object Oriented Programs on the UltraSPARC-II
    Ramesh Radhakrishnan and Lizy John
    International Conference on High Performance Computing (HiPC). pp 202-211. (December 1998)
  • Exploiting Instruction Reuse to Enhance Microprocessor SimulationPDF
    Ravi Bhargava, Lizy K. John, and Francisco Matus
    Tech Report TR-981223-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-981223-01. (December 1998)
  • Workload Characterization: Methodology and Case Studies (Based on the First Workshop on Workload Characterization)
    Edited by Lizy John and Ann M. G. Maynard
    IEEE Computer Society. (November 1998)
  • Workload Characterization: Motivation, Goals, and Methodolgy
    Lizy John, Purnima Vasudevan, and Jyotsna SabarinathanEdited by Lizy John and Ann M. G. Maynard
    Workload Characterization: Methodology and Case Studies. IEEE Computer Society. pp 3-14. (November 1998)
  • Code Coalescing Unit: A Mechanism to Facilitate Load Store Data Communication
    Lizy John, Y. Teh, F. Matus, and Craig Chase
    IEEE International Conference on Computer Design. pp 550-557. (October 1998)
  • Contrasting Branch Characteristics and Branch Predictor Performance of C++ and C Programs
    Dachih-Tang
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (August 1998)
  • Static Energy Recovery Logic for Low Power Adder Design
    Roy Shalem
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (August 1998)
  • Characterization of MMX Enhanced DSP and Multimedia Applications on a General Purpose Processor
    Ravi Bhargava, Ramesh Radhakrishnan, Brian L. Evans, and Lizy John
    Workshop on Performance Analysis and its Impact on Design. pp 16-23. (June 1998)
  • Understanding the Branch Performance of Object Oriented Workloads
    Workshop on Performance Analysis and its Impact on Design. pp 110-121. (June 1998)
  • Investigating the Effectiveness of a Third Level Cache
    Sanjeev Ghai, Jody Joyner, and Lizy K. John
    Tech Report TR-980501-01. Laboratory for Computer Architecture, The University of Texas at Austin. No. TR-980501-01. (May 1998)
  • Design of a Highly Reconfigurable Interconnect for Array Processors
    Lizy John and Eugene B. John
    IEEE Transactions on VLSI. pp 150-157. (March 1998)
  • FPGA Model of MIPS R2000 CPU (won best paper award)
    (March 1998)
  • A Novel Memory Bus Driver/Receiver Architecture for Higher Throughput
    G. Beers and Lizy John
    11th International Conference on VLSI Design. pp 259-264. (January 1998)
  • Hybrid Tree: A Scalable Optoelectronic Interconnection Network for Parallel Computing
    Eugene John, F. Hudson, and Lizy John
    31st Annual Hawaii International Conference on System Sciences. Vol. VII. pp 466-474. (January 1998)

1997

  • Improving Performance of Processors with Small Register Set using Code Coalescing Unit
    Yin Teh
    Department of Electrical and Computer Engineering, The University of Texas at Austin. (December 1997)
  • Design and Performance Evaluation of a Cache Assist to Implement Selective Caching
    Lizy John and A. Subramanian
    IEEE International Conference on Computer Design. pp 510-518. (October 1997)
  • Improving Memory Access Performance
    (August 1997)
  • Experience Teaching a Senior Level Course on Digital Design Using FPGAs
    Lizy John
    IEEE International Conference on Microelectronic Systems Education. pp 97-98. (July 1997)
  • Half-day tutorial on Rapid Prototyping Using FPGAs
    Lizy John
    MSE'97. (July 1997)
  • c_ICE: A Compiler-Based Instruction Cache Exclusion Scheme
    Lizy John and Ramesh Radhakrishnan
    Newsletter of the Technical Committee on Computer Architecture (TCCA). pp 60-61. (June 1997)
  • Modeling and Analysis of the Difference-Bit Cache
    A. Kulkarni, N. Chander, S. Pillai, and Lizy John
    Great Lakes Symposium on VLSI. pp 140-145. (March 1997)
  • c_ICE: A Compiler-Based Instruction Cache Exclusion Scheme
    Lizy John and Ramesh Radhakrishnan
    Workshop on Interaction Between Compilers and Computer Architecture. (February 1997)

1996

  • A Decoupled Architecture with a CISC-Style Access Processor and a RISC-Sytle Execute Processor
    Lizy John
    IEEE VLSI Workshop. (November 1996)
  • Improving the Parallelism and Concurrency in Decoupled Architectures
    Lizy John and Ramesh Radhakrishnan
    8th IEEE Symposium on Parallel and Distributed Processing. pp 130-137. (August 1996)
  • A Performance Model for Prioritized Multiple-Bus Multiprocessor Systems
    Lizy John and Yu-cheng Liu
    IEEE Transactions on Computers. Vol. 45. No. 5. pp 580-588. (May 1996)
  • VaWiRAM: A Variable Width Random Access Memory Module
    Lizy John
    9th International Conference on VLSI Design. pp 219-224. (January 1996)

1995

  • Investigating the Use of Cache as a Local Memory
    Lizy John, Raghu Reddy, Vijay Kammila, and Peter Maurer
    International Conference on High Performance Computing (HiPC). pp 117-122. (December 1995)
  • Classification and Performance Evaluation of Instruction Buffering Techniques
    Lizy JohnEdited by C. M. Krishna
    Performance Modeling for Computer Architects. IEEE Computer Society Press. pp 94-103. (September 1995)
  • Design and VLSI Implementation of an Address Generation Coprocessor
    Paul T. Hulina, Lee D. Coraor, Lizy Kurian, and Eugene John
    IEEE Proceedings on Computers and Digital Techniques. Vol. 142. No. 2. pp 145-151. (March 1995)
  • A Comparative Evaluation of Software Techniques to Hide Memory Latency
    Lizy John, Vinod Reddy, Paul Hulina, and Lee Coraor
    28th Annual Hawaii International Conference on System Sciences. Vol. I. pp 229-238. (January 1995)
  • Design of a Highly Reconfigurable Interconnect for Array Processors
    Lizy Kurian, Daniel Brewer, and Eugene John
    8th International Conference on VLSI Design. pp 321-325. (January 1995)
  • Program Balance and Its Impact on High Performance RISC ArchitecturesPDF
    Lizy Kurian, Vinod Reddy, Paul Hulina, and Lee Coraor
    International Symposium on High Performance Computer Architecture. pp 370-379. (January 1995)

1994

  • A Performance Model for Prioritized Multiple Bus Multiprocessor systems
    Lizy Kurian and Yu-cheng Liu
    IEEE Symposium on Parallel and Distributed Processing. pp 577-584. (October 1994)
  • Memory Latency Effects in Decoupled Architectures
    Lizy Kurian, Paul T. Hulina, and Lee D. Coraor
    IEEE Transactions on Computers. Vol. 43. No. 10. pp 1129-1139. (October 1994)
  • Module Partitioning and Interlaced Data Placement schemes to reduce Conflicts in Interleaved Memories
    Lizy Kurian, Bermjae Choi, Paul T. Hulina, and Lee D. Coraor
    23rd International Conference on Parallel Processing. Vol. 1. pp 212-219. (August 1994)

1992

  • Expected and Obtained Performance from Decoupled Architectures
    Lizy Kurian, Paul T. Hulina, and Lee D. Coraor
    Supercomputing Conference. (November 1992)
  • Role of an Access Processor in a RISC Environment
    Lizy Kurian, Paul T. Hulina, and Lee D. Coraor
    Supercomputing Conference. (November 1992)
  • Design and VLSI Implementation of an Access Processor for a Decoupled Architecture
    Paul T. Hulina, Lizy Kurian, Eugene John, and Lee D. Coraor
    Journal of Microprocessors and Microsystems. Vol. 16. No. 5. pp 237-247. (May 1992)
  • Memory Latency Effects in Decoupled Architectures with a Single Memory Module
    Lizy Kurian, Paul T. Hulina, and Lee D. Coraor
    19th International Symposium On Computer Architecture. pp 236-245. (May 1992)

1991

  • Effect of Hot Spots on Multiprocessor Systems Using Circuit Switched Interconnection Networks
    Lizy Kurian and Matthew J. Thazhuthaveetil
    20th International Conference on Parallel Processing. Vol. I. pp 554-557. (August 1991)
  • Classification and Performance Evaluation of Instruction Buffering TechniquesPDF
    Lizy Kurian, Paul T. Hulina, Lee D. Coraor, and Dhamir N. Mannai
    18th International Symposium on Computer Architecture. pp 150-159. (May 1991)